Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5602D
Rev. 3.1, 02/2011
MPC5602D
100 LQFP
14 mm x 14 mm
64 LQFP
10 mm x 10 mm
MPC5602D Microcontroller
Data Sheet
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Single issue, 32-bit CPU core complex (e200z0)
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Real Time Counter (RTC) with clock source from
128 kHz or 16 MHz internal RC oscillator
supporting autonomous wakeup with 1 ms
resolution with max timeout of 2 seconds
®
— Compliant with the Power Architecture
embedded category
— Includes an instruction set enhancement
allowing variable length encoding (VLE) for
code size footprint reduction. With the optional
encoding of mixed 16-bit and 32-bit
Up to 4 periodic interrupt timers (PIT) with 32-bit
counter resolution
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1 System Module Timer (STM)
instructions, it is possible to achieve significant
code size footprint reduction.
Nexus development interface (NDI) per IEEE-ISTO
5001-2003 Class 1 standard
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Up to 256 KB on-chip Code Flash supported with
Flash controller and ECC
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Device/board boundary Scan testing supported with
per Joint Test Action Group (JTAG) of IEEE (IEEE
1149.1)
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64 KB on-chip Data Flash with ECC
Up to 16 KB on-chip SRAM with ECC
On-chip voltage regulator (VREG) for regulation of
input supply for all internal levels
Interrupt controller (INTC) with multiple interrupt
vectors, including 20 external interrupt sources and
18 external interrupt/wakeup sources
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Frequency modulated phase-locked loop (FMPLL)
Crossbar switch architecture for concurrent access to
peripherals, Flash, or SRAM from multiple bus
masters
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Boot assist module (BAM) supports internal Flash
programming via a serial link (CAN or SCI)
Timer supports input/output channels providing a
range of 16-bit input capture, output compare, and
pulse width modulation functions (eMIOS-lite)
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Up to 33 channel 12-bit analog-to-digital converter
(ADC)
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2 serial peripheral interface (DSPI) modules
3 serial communication interface (LINFlex) modules
1 enhanced full CAN (FlexCAN) module with
configurable buffers
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Up to 79 configurable general purpose pins
supporting input and output operations (package
dependent)
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
© Freescale Semiconductor, Inc., 2009, 2010. All rights reserved.
Preliminary—Subject to Change Without Notice