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MPC5602P

更新时间: 2022-05-14 22:22:41
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恩智浦 - NXP PC微控制器
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95页 2100K
描述
MPC5602P Microcontroller Data Sheet

MPC5602P 数据手册

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Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MPC5602P  
Rev. 6,12/2012  
MPC5602P  
MPC5602P Microcontroller  
Data Sheet  
100 LQFP (14 mm x 14 mm)  
64 LQFP (10 mm x 10 mm)  
Up to 64 MHz, single issue, 32-bit CPU core complex  
(e200z0h)  
1 FlexCAN interface (2.0B Active) with 32 message  
buffers  
1 safety port based on FlexCAN with 32 message  
buffers and up to 8 Mbit/s at 64 MHz capabilitym  
usable as second CAN when not used as safety port  
Compliant with Power Architecture embedded  
category  
Variable Length Encoding (VLE)  
One 10-bit analog-to-digital converter (ADC)  
Memory organization  
Up to 16 input channels (16 ch on 100 LQFP and  
12 ch on 64 LQFP)  
Conversion time < 1 µs including sampling time at  
full precision  
Programmable Cross Triggering Unit (CTU)  
4 analog watchdogs with interrupt capability  
Up to 256 KB on-chip code flash memory with ECC  
and erase/program controller  
Optional: additional 64 (4 × 16) KB on-chip data  
flash memory with ECC for EEPROM emulation  
Up to 20 KB on-chip SRAM with ECC  
Fail-safe protection  
On-chip CAN/UART bootstrap loader with Boot Assist  
Module (BAM)  
1 FlexPWM unit  
Programmable watchdog timer  
Non-maskable interrupt  
Fault collection unit  
8 complementary or independent outputs with ADC  
synchronization signals  
Nexus Class 1 interface  
Interrupts and events  
Polarity control, reload unit  
Integrated configurable dead time unit and inverter  
fault input pins  
16-bit resolution  
Lockable configuration  
16-channel eDMA controller  
16 priority level controller  
Up to 25 external interrupts  
PIT implements four 32-bit timers  
120 interrupts are routed via INTC  
Clock generation  
General purpose I/Os  
4–40 MHz main oscillator  
Individually programmable as input, output or special  
function  
37 on 64 LQFP  
64 on 100 LQFP  
16 MHz internal RC oscillator  
Software-controlled FMPLL capable of up to  
64 MHz  
Voltage supply  
1 general purpose eTimer unit  
3.3 V or 5 V supply for I/Os and ADC  
On-chip single supply voltage regulator with external  
ballast transistor  
6 timers each with up/down capabilities  
16-bit resolution, cascadeable counters  
Quadrature decode with rotation direction flag  
Double buffer input capture and output compare  
Operating temperature ranges: –40 to 125 °C or –40  
to 105 °C  
Communications interfaces  
Up to 2 LINFlex modules (1× Master/Slave, 1×  
Master only)  
Up to 3 DSPI channels with automatic chip select  
generation (up to 8/4/4 chip selects)  
This document contains information on a product under development. Freescale reserves  
the right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2011-2013. All rights reserved.  

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