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MP2007 PDF预览

MP2007

更新时间: 2024-09-09 12:36:47
品牌 Logo 应用领域
芯源 - MPS 稳压器存储双倍数据速率
页数 文件大小 规格书
11页 257K
描述
3A, 1.3V–6.0V DDR Memory Termination Regulator

MP2007 数据手册

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MP2007  
3A, 1.3V–6.0V  
DDR Memory Termination Regulator  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
VDDQ Voltage Range: 1.3V to 6.0 V  
Up to 3A Integrated Sink/Source Linear  
Regulator with Accurate VREF/2 Divider  
Reference for DDR Termination  
Requires Only 20uF Ceramic Output  
Capacitance  
Drive Voltage Range: 4.5 V to 5.5 V  
1.3V Input (VDDQ) Helps Reduce Total  
Power Dissipation  
Integrated Divider Tracks VREF for VTT  
and VTTREF  
Kelvin Sensing (VTTSEN)  
±20mV Accuracy for VTT and VTTREF  
Built-In Soft-Start, UVLO and OCL  
Thermal Shutdown  
The MP2007 integrates the DDR memory  
termination regulator with the output voltage  
(VTT) and a buffered VTTREF outputs is a half  
of VREF.  
The VTT-LDO is a 3A sink/source tracking  
termination regulator. It is specifically designed  
for low-cost/low-external component count  
systems, where space is a premium.  
The MP2007 maintains  
a
fast transient  
response only requiring 20uF (2x10uF) of  
ceramic output capacitance. The MP2007  
supports Kelvin sensing functions.  
The MP2007 is available in the 8-pin MSOP with  
Exposed PAD package and is specified from  
40oC to 85oC.  
APPLICATIONS  
Notebook DDR2/3 Memory Supply and  
Termination Voltage in ACPI Compliant  
Active Termination Busses  
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of  
Monolithic Power Systems, Inc.  
TYPICAL APPLICATION  
VDDQ  
C1  
1
10uF  
1206  
R3  
20  
DDQ  
8
6
VTTREF  
REF  
VTTREF  
C6  
C4  
0.1uF  
0.1uF  
MP2007DH  
5
4
2
VDRV  
VTTSEN  
VTT  
5V  
GND  
VTT  
C7  
R2  
100k  
4.7uF  
7
VTTEN  
EN  
C2  
10uF  
1206  
C3  
10uF  
1206  
GND  
3
C9  
NC  
GND  
MP2007 Rev. 0.9  
7/23/2009  
www.MonolithicPower.com  
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.  
© 2009 MPS. All Rights Reserved.  
1

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