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MM54C193J PDF预览

MM54C193J

更新时间: 2024-11-15 22:39:51
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器
页数 文件大小 规格书
6页 143K
描述
Synchronous 4-Bit Up/Down Decade Counter

MM54C193J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.24
Is Samacsys:N其他特性:TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK
计数方向:BIDIRECTIONAL系列:CMOS
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.43 mm负载电容(CL):50 pF
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:2500000 Hz最大I(ol):0.00036 A
工作模式:SYNCHRONOUS位数:4
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 V传播延迟(tpd):400 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Counters最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:2.5 MHzBase Number Matches:1

MM54C193J 数据手册

 浏览型号MM54C193J的Datasheet PDF文件第2页浏览型号MM54C193J的Datasheet PDF文件第3页浏览型号MM54C193J的Datasheet PDF文件第4页浏览型号MM54C193J的Datasheet PDF文件第5页浏览型号MM54C193J的Datasheet PDF文件第6页 
February 1988  
MM54C192/MM74C192  
Synchronous 4-Bit Up/Down Decade Counter  
MM54C193/MM74C193  
Synchronous 4-Bit Up/Down Binary Counter  
General Description  
Features  
Y
High noise margin  
1V guaranteed  
Drive 2 LPTTL loads  
3V to 15V  
These up/down counters are monolithic complementary  
MOS (CMOS) integrated circuits. The MM54C192 and  
MM74C192 are BCD counters, while the MM54C193 and  
MM74C193 are binary counters.  
Y
Tenth power TTL compatible  
Y
Wide supply range  
Y
Carry and borrow outputs for N-bit cascading  
Asynchronous clear  
Y
Y
Counting up and counting down is performed by two count  
inputs, one being held high while the other is clocked. The  
outputs change on the positive-going transition of this clock.  
High noise immunity  
0.45 V (typ.)  
CC  
These counters feature preset inputs that are set when load  
is a logical ‘‘0’’ and a clear which forces all outputs to ‘‘0’’  
when it is at a logical ‘‘1’’. The counters also have carry and  
borrow outputs so that they can be cascaded using no ex-  
ternal circuitry.  
Connection Diagram  
Dual-In-Line Package  
TL/F/5901–1  
Top View  
Order Number MM54C192, MM74C192,  
MM54C193 or MM74C193  
C
1995 National Semiconductor Corporation  
TL/F/5901  
RRD-B30M105/Printed in U. S. A.  

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