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MM54C193 PDF预览

MM54C193

更新时间: 2024-11-15 22:46:11
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器
页数 文件大小 规格书
6页 143K
描述
Synchronous 4-Bit Up/Down Decade Counter

MM54C193 数据手册

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February 1988  
MM54C192/MM74C192  
Synchronous 4-Bit Up/Down Decade Counter  
MM54C193/MM74C193  
Synchronous 4-Bit Up/Down Binary Counter  
General Description  
Features  
Y
High noise margin  
1V guaranteed  
Drive 2 LPTTL loads  
3V to 15V  
These up/down counters are monolithic complementary  
MOS (CMOS) integrated circuits. The MM54C192 and  
MM74C192 are BCD counters, while the MM54C193 and  
MM74C193 are binary counters.  
Y
Tenth power TTL compatible  
Y
Wide supply range  
Y
Carry and borrow outputs for N-bit cascading  
Asynchronous clear  
Y
Y
Counting up and counting down is performed by two count  
inputs, one being held high while the other is clocked. The  
outputs change on the positive-going transition of this clock.  
High noise immunity  
0.45 V (typ.)  
CC  
These counters feature preset inputs that are set when load  
is a logical ‘‘0’’ and a clear which forces all outputs to ‘‘0’’  
when it is at a logical ‘‘1’’. The counters also have carry and  
borrow outputs so that they can be cascaded using no ex-  
ternal circuitry.  
Connection Diagram  
Dual-In-Line Package  
TL/F/5901–1  
Top View  
Order Number MM54C192, MM74C192,  
MM54C193 or MM74C193  
C
1995 National Semiconductor Corporation  
TL/F/5901  
RRD-B30M105/Printed in U. S. A.  

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