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MK2771-05S PDF预览

MK2771-05S

更新时间: 2024-11-21 20:00:51
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
4页 103K
描述
Clock Generator, 50MHz, CMOS, PDSO20, SOIC-20

MK2771-05S 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
JESD-30 代码:R-PDSO-G20长度:12.8 mm
端子数量:20最高工作温度:70 °C
最低工作温度:最大输出时钟频率:50 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
主时钟/晶体标称频率:14.31818 MHz认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

MK2771-05S 数据手册

 浏览型号MK2771-05S的Datasheet PDF文件第2页浏览型号MK2771-05S的Datasheet PDF文件第3页浏览型号MK2771-05S的Datasheet PDF文件第4页 
ICROCLOCK  
• Packaged in 20 pin SOIC  
The MK2771-05 is a low cost, low jitter, high  
performance VCXO and clock synthesizer for set-  
top boxes. The on-chip Voltage Controlled  
Crystal Oscillator accepts a 0 to 3V input voltage  
to cause the output clocks to vary by ±100 ppm.  
Using MicroClock’s patented VCXO and analog  
Phase-Locked Loop (PLL) techniques, the device  
uses an inexpensive 14.31818 MHz crystal input to  
produce multiple output clocks. All clocks are  
frequency locked to the 27.00MHz output (and to  
each other) with zero ppm error.  
• Uses an inexpensive 14.31818 MHz crystal  
• On-chip patented VCXO with pull range  
of 200ppm (typical)  
• VCXO tuning voltage of 0 to 3V  
• Zero ppm synthesis error (patented) in all  
clocks. All exactly track 27MHz VCXO  
• All clocks are frequency locked. All will vary the  
same amount (in ppm) as the VCXO  
• Selectable Processor clock  
MicroClock manufactures the largest variety of  
Set-Top Box and multimedia clock synthesizers  
for all applications. Consult MicroClock to  
eliminate VCXOs, crystals and oscillators from  
your board.  
• Selectable Audio clock  
• 25mA output drive capability at TTL levels  
• Advanced, low power, sub-micron CMOS process  
• 5V operating voltage  
GND  
AVDD VDD  
3
4
Output  
2
Processor Clock  
Buffer  
PCS1:0  
ACS  
Output  
Clock  
Synthesis  
Circuitry  
16.0000 MHz  
Buffer  
Output  
Buffer  
22.5792 MHz  
or 24.576 MHz  
VIN  
Output  
Buffer  
27.000 MHz  
X1  
X2  
Voltage  
Controlled  
Crystal  
14.31818 MHz  
pullable  
crystal  
Output  
Buffers  
14.31818 MHz  
Oscillator  
MDS2771-05B  
1
Revision 2038  
Printed 11/8/99  
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax  

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