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MK2771-13STR PDF预览

MK2771-13STR

更新时间: 2024-11-20 22:14:47
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路石英晶振压控振荡器光电二极管时钟
页数 文件大小 规格书
4页 66K
描述
VCXO and Set-Top Clock Source

MK2771-13STR 数据手册

 浏览型号MK2771-13STR的Datasheet PDF文件第2页浏览型号MK2771-13STR的Datasheet PDF文件第3页浏览型号MK2771-13STR的Datasheet PDF文件第4页 
MK2771-13  
VCXO and Set-Top Clock Source  
Description  
Features  
The MK2771-03 is a low cost, low jitter, high  
performance VCXO and clock synthesizer  
designed for set-top boxes. The on-chip Voltage  
Controlled Crystal Oscillator accepts a 0 to 3V  
input voltage to cause the output clocks to vary by  
±100 ppm. Using ICS/MicroClock’s patented  
VCXO and analog Phase-Locked Loop (PLL)  
techniques, the device uses an inexpensive  
13.5 MHz crystal input to produce multiple  
output clocks including a selectable processor  
clock, a selectable audio clock, a fixed 33.33 MHz  
or 24.576 MHz, two low skew copies of the  
27MHz, and a fixed 13.5 MHz. All clocks are  
frequency locked to the 27.00MHz output (and to  
each other) with zero ppm error, so any output can  
be used as the VCXO output.  
• Packaged in 20 pin SOIC  
• Pin for pin and functional upgrade to MK2771-03  
• Ideal for systems using Oak’s MPEG decoders  
• On-chip patented VCXO with pull range  
of 200ppm  
• VCXO tuning voltage of 0 to 3V  
• Processor frequency of 16.67 MHz, 20 MHz,  
25 MHz, 32 MHz, 40 MHz, or 50 MHz  
• Audio clocks of 8.192, 11.2896, and 12.288 MHz  
• Zero ppm synthesis error in all clocks (all exactly  
track 27MHz VCXO) - patented  
• Uses an inexpensive 13.5 MHz crystal  
• 25mA output drive capability at TTL levels  
• Advanced, low power, sub-micron CMOS process  
• 5V operating voltage  
This chip directly replaces the MK2771-03 when a  
13.5 MHz input crystal is substituted for the  
14.31818 MHz used on the -03. Additionally, the  
-13 adds 25 MHz to the processor clock selection,  
and 24.576 MHz on the BCLK.  
VDD GND  
Block Diagram  
3
3
2
Output  
PCS1:0  
ACS1:0  
Processor Clock  
Buffer  
2
Output  
Audio Clock  
Buffer  
Clock  
Synthesis  
Circuitry  
BCS  
VIN  
Output  
Buffer  
33.3 MHz or  
24.576 MHz  
2
13.5 MHz  
pullable  
crystal  
X1  
X2  
Output  
Buffers  
Voltage  
Controlled  
Crystal  
27.000 MHz  
13.500 MHz  
Output  
Buffer  
÷ 2  
Oscillator  
MDS 2771-13 A  
1
Revision 110298  
Printed 11/16/00  
Integrated Circuit Systems • 525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com  

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