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MJ11030G PDF预览

MJ11030G

更新时间: 2024-11-20 04:15:35
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
4页 68K
描述
High−Current Complementary Silicon Power Transistors

MJ11030G 数据手册

 浏览型号MJ11030G的Datasheet PDF文件第2页浏览型号MJ11030G的Datasheet PDF文件第3页浏览型号MJ11030G的Datasheet PDF文件第4页 
MJ11028, MJ11030,  
MJ11032 (NPN)  
MJ11029, MJ11033 (PNP)  
High−Current  
Complementary Silicon  
Power Transistors  
http://onsemi.com  
High−Current Complementary Silicon Power Transistors are for use  
as output devices in complementary general purpose amplifier  
applications.  
50 AMPERE  
COMPLEMENTARY  
DARLINGTON POWER  
TRANSISTORS  
Features  
High DC Current Gain − h = 1000 (Min) @ I = 25 Adc  
FE  
C
60 − 120 VOLTS  
300 WATTS  
h
= 400 (Min) @ I = 50 Adc  
C
FE  
Curves to 100 A (Pulsed)  
Diode Protection to Rated I  
C
Monolithic Construction with Built−In Base−Emitter Shunt Resistor  
Junction Temperature to +200_C  
Pb−Free Packages are Available*  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
TO−204 (TO−3)  
CASE 197A  
STYLE 1  
Collector−Emitter Voltage  
MJ11028/29  
MJ11030  
MJ11032/33  
V
CEO  
V
CBO  
V
EBO  
60  
90  
120  
Vdc  
Collector−Base Voltage  
Emitter−Base Voltage  
MJ11028/29  
MJ11030  
MJ11032/33  
60  
90  
120  
Vdc  
MARKING DIAGRAM  
5.0  
Vdc  
Adc  
Collector Current − Continuous  
− Peak (Note 1)  
I
50  
100  
C
MJ110xxG  
AYYWW  
MEX  
Base Current − Continuous  
I
2.0  
Adc  
B
Total Power Dissipation @ T = 25°C  
P
300  
1.71  
W
W/°C  
C
D
Derate Above 25°C @ T = 100_C  
C
Operating and Storage Junction  
Temperature Range  
T , T  
ꢀꢀ55 to +200  
°C  
J
stg  
MJ110xx = Device Code  
xx = 28, 29, 30, 32, 33  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
G
A
YY  
WW  
MEX  
= Pb−Free Package  
= Location Code  
= Year  
Maximum Lead Temperature for  
Soldering Purposes for v 10 seconds  
T
275  
_C  
L
= Work Week  
Thermal Resistance, Junction−to−Case  
R
q
JC  
0.58  
°C/W  
= Country of Orgin  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
December, 2005 − Rev. 5  
MJ11028/D  
 

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