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MGA-85563-TR2G PDF预览

MGA-85563-TR2G

更新时间: 2024-09-16 19:41:07
品牌 Logo 应用领域
安华高科 - AVAGO 放大器射频微波功率放大器
页数 文件大小 规格书
13页 158K
描述
800MHz - 6000MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER, LEAD FREE, ULTRA MINIATURE, SC-70, SOT-363, 6 PIN

MGA-85563-TR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:TSSOP6,.08
Reach Compliance Code:compliantECCN代码:5A991.A
HTS代码:8542.33.00.01风险等级:5.11
其他特性:LOW NOISE特性阻抗:50 Ω
构造:COMPONENT增益:14.5 dB
最大输入功率 (CW):13 dBmJESD-609代码:e3
安装特点:SURFACE MOUNT功能数量:1
端子数量:6最大工作频率:6000 MHz
最小工作频率:800 MHz最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装等效代码:TSSOP6,.08电源:3 V
射频/微波设备类型:WIDE BAND LOW POWER子类别:RF/Microwave Amplifiers
最大压摆率:20 mA表面贴装:YES
技术:GAAS端子面层:Matte Tin (Sn)
最大电压驻波比:1.3Base Number Matches:1

MGA-85563-TR2G 数据手册

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MGA-85563  
3-volt, Low Noise Amplifier  
for 0.8 – 6 GHz Applications  
Data Sheet  
Description  
Features  
Lead-free Option Available  
1.6 dB minimum Noise Figure at 1.9 GHz  
Avago’s MGA-85563 is an easy-to-use GaAs RFIC amplifier  
that offers low noise figure and high gain from 0.8 to  
6 GHz. Packaged in an ultra-miniature SOT-363 package,  
it requires half the board space of a SOT-143 package.  
Adjustable IP3 from +12 dBm to +17 dBm via  
External Resistor  
The MGA-85563 features a minimum noise figure of  
1.6 dB and associated gain of 18 dB at 1.9 GHz. The  
output is matched internally to 50Ω, and the input is par-  
tially matched, requiring only a single external inductor  
for optimal performance. The supply current can be ad-  
justed using an external resistor, varying IP3 from +12  
dBm to +17 dBm.  
18 dB Gain at 1.9 GHz  
Single 3V Supply  
Unconditionally Stable  
Applications  
Amplifier for Cellular, PCS, and Wireless LAN  
The circuit uses state-of-the-art PHEMT technology with  
proven reliability. On-chip bias circuitry allows opera-  
tion from a single +3V supply, while resistive feedback  
ensures stability (K > 1) over frequency and temperature.  
Applications  
Equivalent Circuit (Simplified)  
Surface Mount Package  
SOT-363 (SC-70)  
6
RF OUTPUT  
and V  
d
3
4
BIAS  
RF  
NPUT  
R
bias  
Pin Connections and Package Marking  
1, 2, 5  
BIAS  
GROUND  
OUTPUT  
GND  
GND  
1
2
3
6
5
4
and V  
d
GND  
Attention: Observe precautions for  
handling electrostatic sensitive devices.  
ESD Human Body Model (Class 0)  
R
INPUT  
bias  
Refer to Avago Application Note A004R:  
Electrostatic Discharge Damage and Control.  
Note:  
Package marking provides orientation and identification;  
“xis date code.  

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