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by MCM6709B/D
SEMICONDUCTOR TECHNICAL DATA
MCM6709B
Product Preview
64K x 4 Bit Static RAM
The MCM6709B is a 262,144 bit static random access memory organized as
65,536 words of 4 bit. Static design eliminates the need for external clocks or tim-
ing strobes.
Output enable (G), a special control feature of the MCM6709B, provides in-
creased system flexibility and eliminates bus contention problems.
The MCM6709B is available in a 300 mil, 28 lead plastic surface–mount SOJ
package.
J PACKAGE
300 MIL SOJ
CASE 810B–03
•
•
•
•
•
Single 5 V ± 10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs are TTL Compatible
Three State Outputs
Fast Access Times: MCM6709B–8 = 8 ns
MCM6709B–10 = 10 ns
PIN ASSIGNMENT
NC
A
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
A
A
A
A
A
A
CC
2
MCM6709B–12 = 12 ns
A
3
A
4
A
5
A
6
BLOCK DIAGRAM
A
7
A
A
8
NC
NC
DQ
DQ
DQ
DQ
W
A
A
A
9
A
10
11
12
13
14
A
MEMORY MATRIX
256 ROWS x 256 x 4
COLUMNS
A
A
ROW
DECODER
•
•
•
E
G
A
A
A
V
SS
PIN NAMES
DQ
COLUMN I/O
COLUMN DECODER
•
•
•
INPUT
DATA
CONTROL
•
•
•
A . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . Data Input/Output
. . . . . . . . . . + 5 V Power Supply
. . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . No Connection
•
•
•
DQ
A
A
A
A
A
A
A
A
V
CC
V
SS
E
W
G
This document contains informantion on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 1
10/9/96
Motorola, Inc. 1996
MOTOROLA FAST SRAM
MCM6709B
1