Datasheet > MCM6264CJ35

MCM6264CJ35

更新时间： 2024-10-31 22:15:51

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
8页	181K
描述
8K x 8 Bit Fast Static RAM

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MCM6264CJ35 数据手册

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SEMICONDUCTOR TECHNICAL DATA

MCM6264C

8K x 8 Bit Fast Static RAM

TheMCM6264CisfabricatedusingMotorola’shigh–performancesilicon–gate

CMOS technology. Static design eliminates the need for external clocks or timing

strobes, while CMOS circuitry reduces power consumption and provides for

greater reliability.

This device meets JEDEC standards for functionality and pinout, and is avail-

able in plastic dual–in–line and plastic small–outline J–leaded packages.

P PACKAGE

300 MIL PLASTIC

CASE 710B–01

•

Single 5 V ± 10% Power Supply

Fully Static — No Clock or Timing Strobes Necessary

Fast Access Times: 12, 15, 20, 25, and 35 ns

Equal Address and Chip Enable Access Times

Output Enable (G) Feature for Increased System Flexibility and to

Eliminate Bus Contention Problems

J PACKAGE

300 MIL SOJ

CASE 810B–03

•

Low Power Operation: 110 – 150 mA Maximum AC

Fully TTL Compatible — Three State Output

PIN ASSIGNMENT

BLOCK DIAGRAM

A12

A11

MEMORY MATRIX

256 ROWS x 32

x 9 COLUMNS

ROW

DECODER

A10

DQ7

DQ6

DQ5

DQ4

DQ0

A11

DQ1

DQ2

DQ0

COLUMN I/O

INPUT

DATA

CONTROL

COLUMN DECODER

DQ3

DQ7

A0 A1 A6 A10 A12

PIN NAMES

A0 – A12 . . . . . . . . . . . . . Address Input

DQ0 – DQ7 . . . Data Input/Data Output

W . . . . . . . . . . . . . . . . . . . . Write Enable

G . . . . . . . . . . . . . . . . . . . Output Enable

E1, E2 . . . . . . . . . . . . . . . . . Chip Enable

. . . . . . . . . . . Power Supply (+ 5 V)

. . . . . . . . . . . . . . . . . . . . . . . Ground

REV 2

5/95

Motorola, Inc. 1995

MOTOROLA FAST SRAM

MCM6264C

12 3 4 5 6 7 8

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