Datasheet > MCM6246WJ35R2

MCM6246WJ35R2

更新时间： 2024-01-12 14:32:13

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		存储
页数	文件大小	规格书
8页	130K
描述
512K x 8 Bit Static Random Access Memory

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数据手册

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MCM6246WJ35R2 数据手册

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by MCM6246/D

SEMICONDUCTOR TECHNICAL DATA

MCM6246

512K x 8 Bit Static Random

Access Memory

The MCM6246 is a 4,194,304 bit static random access memory organized as

524,288 words of 8 bits. Static design eliminates the need for external clocks or

timing strobes, while CMOS circuitry reduces power consumption and provides

for greater reliability.

The MCM6246 is equipped with chip enable (E) and output enable (G) pins,

allowing for greater system flexibility and eliminating bus contention problems.

Either input, when high, will force the outputs into high impedance.

TheMCM6246isavailableina400mil, 36–leadsurface–mountSOJpackage.

WJ PACKAGE

400 MIL SOJ

CASE 893–01

PIN ASSIGNMENT

•

Single 5 V ± 10% Power Supply

Fast Access Time: 17/20/25/35 ns

Equal Address and Chip Enable Access Time

All Inputs and Outputs are TTL Compatible

Three–State Outputs

Power Operation: 205/200/185/170 mA Maximum, Active AC

BLOCK DIAGRAM

MEMORY MATRIX

1024 ROWS x

4096 COLUMNS

ROW

DECODER

COLUMN I/O

COLUMN DECODER

PIN NAMES

INPUT

DATA

CONTROL

A . . . . . . . . . . . . . . . . . . . Address Inputs

W . . . . . . . . . . . . . . . . . . . . Write Enable

G . . . . . . . . . . . . . . . . . . . Output Enable

E . . . . . . . . . . . . . . . . . . . . . . Chip Enable

DQ . . . . . . . . . . . . . . . Data Input/Output

NC . . . . . . . . . . . . . . . . . No Connection

. . . . . . . . . . . . + 5 V Power Supply

. . . . . . . . . . . . . . . . . . . . . . . Ground

REV 5

6/9/97

Motorola, Inc. 1997

MOTOROLA FAST SRAM

MCM6246

12 3 4 5 6 7 8

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