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MCM32515SG25 PDF预览

MCM32515SG25

更新时间: 2024-11-10 22:18:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 存储静态存储器
页数 文件大小 规格书
8页 84K
描述
512K x 32 Bit Fast Static RAM Module

MCM32515SG25 技术参数

生命周期:Obsolete零件包装代码:SIMM
包装说明:SIMM, SSIM72针数:72
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.6
Base Number Matches:1

MCM32515SG25 数据手册

 浏览型号MCM32515SG25的Datasheet PDF文件第2页浏览型号MCM32515SG25的Datasheet PDF文件第3页浏览型号MCM32515SG25的Datasheet PDF文件第4页浏览型号MCM32515SG25的Datasheet PDF文件第5页浏览型号MCM32515SG25的Datasheet PDF文件第6页浏览型号MCM32515SG25的Datasheet PDF文件第7页 
Order this document  
by MCM32515/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM32515  
Advance Information  
512K x 32 Bit  
PIN ASSIGNMENT  
TOP VIEW  
Fast Static RAM Module  
The MCM32515 is a 16M bit static random access memory module organized  
as 524,288 words of 32 bits. The module is offered in a 72–lead single in–line  
memory module (SIMM). Four MCM6246 fast static RAMs, packaged in 36–lead  
SOJpackagesaremountedonaprintedcircuitboardalongwitheightdecoupling  
capacitors.  
The MCM6246 is a high–performance CMOS fast static RAM organized as  
524,288 words of 8 bits. Static design eliminates the need for external clocks or  
timing strobes, while CMOS circuitry reduces power consumption and provides  
for greater reliability.  
The MCM32515 is equipped with output enable (G) and four separate byte en-  
able (E1 – E4) inputs, allowing for greater system flexibility. The G input, when  
high, will force the outputs to high impedance. Ex high will do the same for byte x.  
72 LEAD SIMM — CASE TBD  
1
3
NC  
2
4
6
NC  
PD2  
PD3  
V
5
SS  
PD0  
DQ0  
DQ1  
7
PD1  
DQ8  
8
9
10  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
DQ9  
DQ10  
DQ11  
A0  
12  
DQ2  
DQ3  
14  
16  
18  
V
CC  
A7  
A1  
20  
22  
24  
26  
28  
A8  
A9  
A2  
Single 5 V ± 10% Power Supply  
Fast Access Times: 20/25 ns  
Three–State Outputs  
Fully TTL Compatible  
DQ12  
DQ13  
DQ14  
DQ15  
DQ4  
DQ5  
DQ6  
JEDEC Standard Pinout  
DQ7  
W
30  
32  
Power Requirement: 800/740 mA Maximum, Active AC  
High Board Density SIMM Package  
Byte Operation: Four Separate Chip Enables, One for Each Byte  
High Quality Six–Layer FR4 PWB with Separate Internal Power and  
Ground Planes  
V
SS  
33  
35  
A15  
E2  
A14  
E1  
34  
36  
Incorporates Motorola’s State–of–the–Art Fast Static RAMs  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
61  
63  
65  
67  
E4  
E3  
38  
40  
42  
A17  
G
A16  
V
SS  
DQ24  
DQ25  
DQ26  
DQ27  
A3  
PIN NAMES  
DQ16  
DQ17  
DQ18  
44  
46  
48  
A0 – A18 . . . . . . . . . . . . . . . . . . . . . . . . . . . Address Inputs  
W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Enable  
G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Enable  
E1 – E4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Enables  
DQ0 – DQ31 . . . . . . . . . . . . . . . . . . . . . . Data Input/Output  
DQ19  
A10  
50  
52  
54  
V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . + 5 V Power Supply  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground  
A4  
CC  
SS  
A11  
A5  
A12  
A13  
56  
58  
60  
62  
64  
PD0 – PD3 . . . . . . . . . . . . . . . . . . . . . . . . Package Density  
NC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . No Connect  
V
CC  
A6  
For proper operation of the device, V mustbeconnected  
SS  
to ground.  
DQ20  
DQ21  
DQ22  
DQ28  
DQ29  
DQ30  
DQ31  
A18  
DQ23  
66  
68  
V
SS  
69  
71  
NC  
NC  
70  
72  
NC  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
REV 2  
4/7/97  
Motorola, Inc. 1997  

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