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MC74VHCT393ADR2

更新时间： 2024-12-02 00:58:47
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安森美 - ONSEMI /
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描述
Dual 4−Bit Binary Ripple Counter

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MC74VHCT393ADR2 数据手册

 浏览型号MC74VHCT393ADR2的Datasheet PDF文件第2页浏览型号MC74VHCT393ADR2的Datasheet PDF文件第3页浏览型号MC74VHCT393ADR2的Datasheet PDF文件第4页浏览型号MC74VHCT393ADR2的Datasheet PDF文件第5页浏览型号MC74VHCT393ADR2的Datasheet PDF文件第6页浏览型号MC74VHCT393ADR2的Datasheet PDF文件第7页 
MC74VHCT393A  
Advance Information  
Dual 4−Bit Binary Ripple  
Counter  
The MC74VHCT393A is an advanced high speed CMOS dual 4−bit  
binary ripple counter fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
http://onsemi.com  
MARKING DIAGRAMS  
This device consists of two independent 4−bit binary ripple counters  
with parallel outputs from each counter stage. A ÷256 counter can be  
obtained by cascading the two binary counters.  
Internal flip−flops are triggered by high−to−low transitions of the clock  
input. Reset for the counters is asynchronous and active−high. State  
changes of the Q outputs do not occur simultaneously because of internal  
ripple delays. Therefore, decoded output signals are subject to decoding  
spikes and should not be used as clocks or as strobes except when gated  
with the Clock of the VHC393.  
The VHCT inputs are compatible with TTL levels. This device can be  
used as a level converter for interfacing 3.3 V to 5.0 V because it has full 5  
V CMOS level output swings.  
The VHCT393A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage. The  
14  
1
8
7
VHCT393A  
AWLYWW  
SOIC−14  
D SUFFIX  
CASE 751A  
14  
8
VHCT  
393A  
AWLYWW  
TSSOP−14  
DT SUFFIX  
CASE 948G  
7
1
output structures also provide protection when V = 0 V. These input and  
CC  
output structures help prevent device destruction caused by supply  
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output., The inputs  
tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V  
systems.  
A
= Assembly Location  
= Year  
WL = Wafer Lot  
Y
WW = Work Week  
14  
8
7
• High Speed: f  
= 170MHz (Typ) at V = 5V  
CC  
max  
VHCT393A  
ALYW  
• Low Power Dissipation: I = 4μA (Max) at T = 25°C  
CC  
A
SOIC EIAJ−14  
M SUFFIX  
1
• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
• Designed for 2V to 5.5V Operating Range  
CASE 965  
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
• Low Noise: V  
= 0.8V (Max)  
OLP  
W = Work Week  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300mA  
• ESD Performance: HBM > 2000V; Machine Model > 200V  
ORDERING INFORMATION  
PIN ASSIGNMENT  
Device  
Package  
Shipping  
CP1  
RD1  
1QA  
1QB  
1QC  
1QD  
GND  
1
2
3
4
5
6
7
14  
13  
V
CC  
MC74VHCT393AD  
SOIC−16  
55 Units/Rail  
MC74VHCT393ADR2 SOIC−16 1000 Units/Reel  
MC74VHCT393ADT TSSOP−16 96 Units/Rail  
12 RD2  
11 2QA  
10 2QB  
MC74VHCT393ADTR2 TSSOP−16 2500 Units/Reel  
SOIC  
EIAJ−16  
9
8
2Q  
C
2QD  
MC74VHCT393AM  
50 Units/Rail  
SOIC  
EIAJ−16  
MC74VHCT393AMEL  
2000 Units/Reel  
This document contains information on a new product. Specifications and information  
herein are subject to change without notice.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 1  
MC74VHCT393A/D  
1234567...9

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