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MC74VHCT540A_06

更新时间: 2024-12-01 05:22:07
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安森美 - ONSEMI /
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7页 165K
描述
Octal Bus Buffer

MC74VHCT540A_06 数据手册

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MC74VHCT540A  
Octal Bus Buffer  
Inverting  
The MC74VHCT540A is an advanced high speed CMOS inverting  
octal bus buffer fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
The MC74VHCT540A features inputs and outputs on opposite  
sides of the package and two ANDed activelow output enables.  
When either OE1 or OE2 are high, the terminal outputs are in the  
high impedance state.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V, because it  
has full 5.0 V CMOS level output swings.  
SOIC  
DW SUFFIX  
CASE 751D  
VHCT540A  
AWLYYWW  
20  
1
The VHCT540A input and output (when disabled) structures  
provide protection when voltages between 0 V and 5.5 V are applied,  
regardless of the supply voltage. These input and output structures  
help prevent device destruction caused by supply voltage −  
input/output voltage mismatch, battery backup, hot insertion, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
VHCT  
540A  
ALYW  
TSSOP  
DT SUFFIX  
CASE 948E  
20  
1
Features  
SOIC EIAJ  
M SUFFIX  
CASE 967  
74VHCT540  
AWLYWW  
20  
High Speed: t = 3.7 ns (Typ) at V = 5.0 V  
Low Power Dissipation: I = 4.0 μA (Max) at T = 25°C  
TTLCompatible Inputs: V = 0.8 V; V = 2.0 V  
PD  
CC  
CC  
A
1
IL  
IH  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Designed for 2.0 V to 5.5 V Operating Range  
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
Low Noise: V  
= 1.2 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
FUNCTION TABLE  
Inputs  
Output Y  
OE1  
OE2  
A
Chip Complexity: 124 FETs or 31 Equivalent Gates  
L
L
H
L
L
X
L
H
X
X
H
L
Z
w These devices are available in Pbfree package(s). Specifications herein  
apply to both standard and Pbfree devices. Please see our website at  
www.onsemi.com for specific Pbfree orderable part numbers, or contact  
your local ON Semiconductor sales office or representative.  
X
H
Z
ORDERING INFORMATION  
Device  
Package  
SOIC  
Shipping  
38 Units/Rail  
75 Units/Rail  
50 Units/Rail  
MC74VHCT540ADW  
MC74VHCT540ADT  
MC74VHCT540AM  
TSSOP  
SOIC  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 Rev. 4  
MC74VHCT540A/D  

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