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MC74VHCT157AM

更新时间： 2024-11-04 20:29:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 199K
描述
AHCT/VHCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, EIAJ, SOIC-16

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MC74VHCT157AM 技术参数

生命周期：Transferred零件包装代码：SOIC
包装说明：SOP,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.54Is Samacsys：N
系列：AHCT/VHCTJESD-30 代码：R-PDSO-G16
长度：10.2 mm逻辑集成电路类型：MULTIPLEXER
功能数量：4输入次数：2
输出次数：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE传播延迟（tpd）：15 ns
认证状态：Not Qualified座面最大高度：2.05 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：5.275 mm
Base Number Matches：1

MC74VHCT157AM 数据手册

 浏览型号MC74VHCT157AM的Datasheet PDF文件第2页浏览型号MC74VHCT157AM的Datasheet PDF文件第3页浏览型号MC74VHCT157AM的Datasheet PDF文件第4页浏览型号MC74VHCT157AM的Datasheet PDF文件第5页浏览型号MC74VHCT157AM的Datasheet PDF文件第6页浏览型号MC74VHCT157AM的Datasheet PDF文件第7页 
The MC74VHCT157A is an advanced high speed CMOS quad  
2–channel multiplexer fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
It consists of four 2–input digital multiplexers with common select (S)  
and enable (E) inputs. When E is held High, selection of data is inhibited  
and all the outputs go Low.  
The select decoding determines whether the A or B inputs get routed to  
the corresponding Y outputs.  
The VHCT inputs are compatible with TTL levels. This device can be  
used as a level converter for interfacing 3.3 V to 5.0 V because it has full  
5 V CMOS level output swings.  
http://onsemi.com  
MARKING DIAGRAMS  
14  
1
8
7
VHCT157A  
AWLYWW  
SOIC–14  
D SUFFIX  
CASE 751A  
The VHCT157A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage. The  
14  
8
output structures also provide protection when V = 0 V. These input and  
CC  
VHCT  
157A  
output structures help prevent device destruction caused by supply  
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The inputs  
tolerate voltages up to 7V, allowing the interface of 5V systems to 3V  
systems.  
TSSOP–14  
DT SUFFIX  
CASE 948G  
AWLYWW  
7
1
• High Speed: t  
= 4.1ns (Typ) at V  
= 5V  
PD  
• Low Power Dissipation: I  
CC  
= 4µA (Max) at T = 25°C  
A
= Assembly Location  
= Year  
CC  
A
WL = Wafer Lot  
Y
WW = Work Week  
• TTL–Compatible Inputs: V = 0.8 V; V = 2.0 V  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
IL IH  
• Designed for 2V to 5.5V Operating Range  
14  
8
• Low Noise: V  
= 0.8V (Max)  
OLP  
VHCT157A  
ALYW  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300mA  
• ESD Performance: HBM > 2000V; Machine Model > 200V  
• Chip Complexity: 82 FETs or 20 Equivalent Gates  
SOIC EIAJ–14  
M SUFFIX  
CASE 965  
7
1
A
L
= Assembly Location  
= Wafer Lot  
PIN ASSIGNMENT  
Y
= Year  
W = Work Week  
V
S
1
2
16  
15  
CC  
A0  
E
ORDERING INFORMATION  
B0  
Y0  
A3  
B3  
Y3  
A2  
B2  
Y2  
3
4
14  
13  
Device  
Package  
Shipping  
MC74VHCT157AD  
SOIC–16  
55 Units/Rail  
A1  
5
6
12  
11  
MC74VHCT157ADT TSSOP–16  
SOIC  
96 Units/Rail  
50 Units/Rail  
B1  
7
8
10  
Y1  
MC74VHCT157AM  
EIAJ–16  
GND  
9
This document contains information on a new product. Specifications and information  
herein are subject to change without notice.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
May, 2000 – Rev. 0  
MC74VHCT157A/D  
12345678

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