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MC74VHC1GT126DT1G PDF预览

MC74VHC1GT126DT1G

更新时间: 2024-11-04 21:20:31
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 127K
描述
AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-59, SOT-23, TSOP-5

MC74VHC1GT126DT1G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP包装说明:TSSOP,
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:12 weeks
风险等级:5.21系列:AHC/VHC
JESD-30 代码:R-PDSO-G5长度:3 mm
逻辑集成电路类型:BUS DRIVER位数:1
功能数量:1端口数量:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):16 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.5 mm
Base Number Matches:1

MC74VHC1GT126DT1G 数据手册

 浏览型号MC74VHC1GT126DT1G的Datasheet PDF文件第2页浏览型号MC74VHC1GT126DT1G的Datasheet PDF文件第3页浏览型号MC74VHC1GT126DT1G的Datasheet PDF文件第4页浏览型号MC74VHC1GT126DT1G的Datasheet PDF文件第5页浏览型号MC74VHC1GT126DT1G的Datasheet PDF文件第6页 
MC74VHC1GT126  
Noninverting Buffer /  
CMOS Logic Level Shifter  
with LSTTLCompatible Inputs  
The MC74VHC1GT126 is a single gate noninverting 3state buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The MC74VHC1GT126 requires the 3state control input (OE) to be  
set Low to place the output into the high impedance state.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The device input is compatible with TTLtype input thresholds and  
the output has a full 5 V CMOS level output swing. The input  
protection circuitry on this device allows overvoltage tolerance on the  
input, allowing the device to be used as a logiclevel translator from  
3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to  
3 V CMOS Logic while operating at the highvoltage power supply.  
The MC74VHC1GT126 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT126 to be used to interface 5 V circuits to  
3 V circuits. The output structures also provide protection when  
5
5
1
W3 M G  
SC88A / SOT353 / SC70  
DF SUFFIX  
G
CASE 419A  
1
5
5
W3 M G  
G
1
TSOP5 / SOT23 / SC59  
DT SUFFIX  
1
V
CC  
= 0 V. These input and output structures help prevent device  
destruction caused by supply voltage input/output voltage mismatch,  
battery backup, hot insertion, etc.  
CASE 483  
Features  
High Speed: t = 3.5 ns (Typ) at V = 5 V  
W3 = Device Code  
PD  
CC  
M
G
= Date Code*  
= PbFree Package  
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
TTLCompatible Inputs: V = 0.8 V; V = 2 V  
IL  
IH  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
CMOSCompatible Outputs: V > 0.8 V ; V < 0.1 V @Load  
OH  
CC  
OL  
CC  
Power Down Protection Provided on Inputs and Outputs  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 62; Equivalent Gates = 16  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
PIN ASSIGNMENT  
1
2
3
4
5
OE  
IN A  
GND  
OUT Y  
These Devices are PbFree and are RoHS Compliant  
V
CC  
OE  
IN A  
GND  
5
4
V
CC  
1
2
3
FUNCTION TABLE  
OE Input  
A Input  
Y Output  
L
H
X
H
H
L
L
H
Z
OUT Y  
Figure 1. Pinout (Top View)  
OE  
IN A  
OUT Y  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
May, 2012 Rev. 15  
MC74VHC1GT126/D  

MC74VHC1GT126DT1G 替代型号

型号 品牌 替代类型 描述 数据表
M74VHC1GT126DT1G ONSEMI

完全替代

Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs
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