Datasheet > MC74VHC1G125_11

MC74VHC1G125_11

更新时间： 2024-01-20 00:35:44

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	123K
描述
Noninverting 3-State Buffer

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MC74VHC1G125_11 数据手册

MC74VHC1G125

Noninverting 3-State Buffer

The MC74VHC1G125 is an advanced high speed CMOS

noninverting 3−state buffer fabricated with silicon gate CMOS

technology. It achieves high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining CMOS low power

dissipation.

The internal circuit is composed of three stages, including a buffered

3−state output which provides high noise immunity and stable output.

The MC74VHC1G125 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1G125 to be used to interface 5 V circuits to 3 V

circuits.

http://onsemi.com

MARKING

DIAGRAMS

W0 M G

SC−88A / SOT−353 / SC−70

DF SUFFIX

Features

CASE 419A

• High Speed: t = 3.5 ns (Typ) at V = 5 V

• Low Power Dissipation: I = 1 mA (Max) at T = 25°C

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

W0 M G

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 58; Equivalent Gates = 15

• These Devices are Pb−Free and are RoHS Compliant

TSOP−5 / SOT−23 / SC−59

DT SUFFIX

CASE 483

W0 = Device Code

= Date Code*

= Pb−Free Package

IN A

GND

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

PIN ASSIGNMENT

OUT Y

IN A

Figure 1. Pinout (Top View)

GND

OUT Y

IN A

FUNCTION TABLE

OE Input

OUT Y

A Input

Y Output

Figure 2. Logic Symbol

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

May, 2011 − Rev. 16

MC74VHC1G125/D

12 3 4 5 6

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MC74VHC1G125DFT2	ONSEMI	获取价格	Noninverting 3-State Buffer
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