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MC74VHC1G125DTT3 PDF预览

MC74VHC1G125DTT3

更新时间: 2024-11-04 14:53:15
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 119K
描述
AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-59, SOT-23, TSOP-5

MC74VHC1G125DTT3 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:SC-59, SOT-23, TSOP-5
针数:5Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.53
Is Samacsys:N控制类型:ENABLE LOW
系列:AHC/VHCJESD-30 代码:R-PDSO-G5
JESD-609代码:e0长度:3 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A位数:1
功能数量:1端口数量:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP封装等效代码:TSOP5/6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.5 mmBase Number Matches:1

MC74VHC1G125DTT3 数据手册

 浏览型号MC74VHC1G125DTT3的Datasheet PDF文件第2页浏览型号MC74VHC1G125DTT3的Datasheet PDF文件第3页浏览型号MC74VHC1G125DTT3的Datasheet PDF文件第4页浏览型号MC74VHC1G125DTT3的Datasheet PDF文件第5页浏览型号MC74VHC1G125DTT3的Datasheet PDF文件第6页 
MC74VHC1G125  
Noninverting 3-State Buffer  
The MC74VHC1G125 is an advanced high speed CMOS  
noninverting 3state buffer fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining CMOS low power  
dissipation.  
The internal circuit is composed of three stages, including a buffered  
3state output which provides high noise immunity and stable output.  
The MC74VHC1G125 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1G125 to be used to interface 5 V circuits to 3 V  
circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
5
5
1
W0 M G  
SC88A / SOT353 / SC70  
DF SUFFIX  
G
Features  
1
CASE 419A  
High Speed: t = 3.5 ns (Typ) at V = 5 V  
PD  
CC  
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
Power Down Protection Provided on Inputs  
5
5
Balanced Propagation Delays  
W0 M G  
G
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 58; Equivalent Gates = 15  
1
1
TSOP5 / SOT23 / SC59  
DT SUFFIX  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
CASE 483  
W0 = Device Code  
These Devices are PbFree and are RoHS Compliant  
M
G
= Date Code*  
= PbFree Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
1
2
3
5
V
CC  
OE  
IN A  
GND  
PIN ASSIGNMENT  
1
2
3
4
5
OE  
IN A  
GND  
4
OUT Y  
OUT Y  
V
CC  
Figure 1. Pinout (Top View)  
FUNCTION TABLE  
OE Input  
A Input  
Y Output  
L
H
X
L
L
L
H
Z
OE  
IN A  
EN  
OUT Y  
H
Figure 2. Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
December, 2012 Rev. 17  
MC74VHC1G125/D  

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AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN