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MC74VHC1G132DFT2 PDF预览

MC74VHC1G132DFT2

更新时间: 2024-09-28 21:53:43
品牌 Logo 应用领域
安森美 - ONSEMI 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 73K
描述
2-Input NAND Schmitt-Trigger

MC74VHC1G132DFT2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOT-353包装说明:TSSOP, TSSOP5/6,.08
针数:5Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.44
系列:AHC/VHCJESD-30 代码:R-PDSO-G5
JESD-609代码:e0长度:2 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1输入次数:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:2/5.5 VProp。Delay @ Nom-Sup:12.3 ns
传播延迟(tpd):19.6 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1.25 mmBase Number Matches:1

MC74VHC1G132DFT2 数据手册

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MC74VHC1G132  
2−Input NAND  
Schmitt−Trigger  
The MC74VHC1G132 is a single gate CMOS Schmitt NAND  
trigger fabricated with silicon gate CMOS technology. It achieves high  
speed operation similar to equivalent Bipolar Schottky TTL while  
maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The MC74VHC1G132 input structure provides protection when  
voltages up to 7.0 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1G132 to be used to interface 5.0 V circuits to  
3.0 V circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
5
5
1
VD M G  
SC−88A/SOT−353/SC−70  
DF SUFFIX  
G
The MC74VHC1G132 can be used to enhance noise immunity or to  
square up slowly changing waveforms.  
1
5
CASE 419A  
Features  
High Speed: t = 3.6 ns (Typ) at V = 5.0 V  
PD  
CC  
5
VD AYW G  
G
Low Power Dissipation: I = 1.0 mA (Max) at T = 25°C  
CC  
A
1
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
1
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 68; Equivalent Gates = 16  
Pb−Free Packages are Available  
CASE 483  
VD  
M
A
= Device Code  
= Date Code*  
= Assembly Location  
= Year  
Y
W
G
= Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
5
V
IN B  
IN A  
GND  
1
2
3
CC  
PIN ASSIGNMENT  
1
2
3
4
5
IN B  
IN A  
GND  
4
OUT Y  
OUT Y  
V
CC  
Figure 1. Pinout (Top View)  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
L
L
L
H
L
H
H
H
L
IN A  
IN B  
&
OUT Y  
H
H
H
Figure 2. Logic Symbol  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 17  
MC74VHC1G132/D  

MC74VHC1G132DFT2 替代型号

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