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MC74VHC1G14DBVT1G

更新时间： 2024-11-05 11:01:47
品牌 Logo 应用领域
安森美 - ONSEMI 栅光电二极管逻辑集成电路触发器栅极
页数 文件大小 规格书
6页 79K
描述
Single Inverter, Schmitt Trigger Input

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中文翻译

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MC74VHC1G14DBVT1G 技术参数

是否无铅： 不含铅生命周期：Active
包装说明：SC-74A, 5 PINReach Compliance Code：compliant
Factory Lead Time：43 weeks 1 day风险等级：1.64
Samacsys Description：Inverters Single Inver Schmitt Trigger Input系列：AHC/VHC
JESD-30 代码：R-PDSO-G5长度：3 mm
负载电容（CL）：50 pF逻辑集成电路类型：INVERTER
最大I（ol）：0.008 A功能数量：1
输入次数：1端子数量：5
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSOP
封装等效代码：TSOP5/6,.11,37封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE包装方法：TR
峰值回流温度（摄氏度）：NOT SPECIFIED最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：13.5 ns传播延迟（tpd）：20.5 ns
施密特触发器：YES座面最大高度：1.1 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子节距：0.95 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1.5 mm

MC74VHC1G14DBVT1G 数据手册

 浏览型号MC74VHC1G14DBVT1G的Datasheet PDF文件第2页浏览型号MC74VHC1G14DBVT1G的Datasheet PDF文件第3页浏览型号MC74VHC1G14DBVT1G的Datasheet PDF文件第4页浏览型号MC74VHC1G14DBVT1G的Datasheet PDF文件第5页浏览型号MC74VHC1G14DBVT1G的Datasheet PDF文件第6页 
MC74VHC1GT14  
Schmitt−Trigger Inverter /  
CMOS Logic Level Shifter  
LSTTL−Compatible Inputs  
The MC74VHC1GT14 is a single gate CMOS Schmitt−trigger  
inverter fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
http://onsemi.com  
MARKING  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The device input is compatible with TTL−type input thresholds and  
the output has a full 5 V CMOS level output swing. The input protection  
circuitry on this device allows overvoltage tolerance on the input,  
allowing the device to be used as a logic−level translator from 3 V  
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V  
CMOS Logic while operating at the high−voltage power supply.  
The MC74VHC1GT14 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT14 to be used to interface 5 V circuits to 3 V  
DIAGRAMS  
5
VC M G  
SC−88A/SC70−5/SOT−353  
DF SUFFIX  
G
CASE 419A  
1
5
5
VC M G  
circuits. The output structures also provide protection when V = 0 V.  
1
CC  
G
These input and output structures help prevent device destruction  
caused by supply voltage − input/output voltage mismatch, battery  
backup, hot insertion, etc. The MC74VHC1GT14 can be used to  
enhance noise immunity or to square up slowly changing waveforms.  
TSOP−5/SOT23−5/SC59−5  
DT SUFFIX  
1
CASE 483  
VC = Device Code  
M
G
= Date Code*  
= Pb−Free Package  
Features  
• High Speed: t = 4.5 ns (Typ) at V = 5 V  
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
• TTL−Compatible Inputs: V = 0.8 V; V = 2 V  
PD  
CC  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
CC  
A
IL  
IH  
• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load  
OH  
CC  
OL  
CC  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
• Pin and Function Compatible with Other Standard Logic Families  
• Chip Complexity: FETs = 100; Equivalent Gates = 25  
• Pb−Free Packages are Available  
PIN ASSIGNMENT  
1
2
3
4
5
NC  
IN A  
GND  
OUT Y  
V
CC  
5
V
CC  
NC  
1
2
3
FUNCTION TABLE  
IN A  
A Input  
Y Output  
4
GND  
OUT Y  
L
H
L
H
Figure 1. Pinout (Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
1
IN A  
OUT Y  
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 12  
MC74VHC1GT14/D  
123456

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