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MC74VHC1G135DFT1 PDF预览

MC74VHC1G135DFT1

更新时间: 2024-11-03 23:05:47
品牌 Logo 应用领域
乐山 - LRC 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
4页 155K
描述
2-Input NANDSchmitt-Trigger with Open Drain Output

MC74VHC1G135DFT1 技术参数

生命周期:Contact Manufacturer包装说明:SC-70, 5 PIN
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.78Is Samacsys:N
系列:AHC/VHC/H/U/VJESD-30 代码:R-PDSO-G5
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A功能数量:1
输入次数:2端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL电源:2/5.5 V
Prop。Delay @ Nom-Sup:12.3 ns传播延迟(tpd):19.6 ns
认证状态:Not Qualified施密特触发器:YES
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
Base Number Matches:1

MC74VHC1G135DFT1 数据手册

 浏览型号MC74VHC1G135DFT1的Datasheet PDF文件第2页浏览型号MC74VHC1G135DFT1的Datasheet PDF文件第3页浏览型号MC74VHC1G135DFT1的Datasheet PDF文件第4页 
LESHAN RADIO COMPANY, LTD.  
2-Input NANDSchmitt-Trigger with  
Open Drain Output  
MC74VHC1G135  
The MC74VHC1G135 is a single gate CMOS Schmitt NAND trigger with an open drain output fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including an open drain output which provides the capability to set the output switching  
level. This allows the MC74VHC1G135 to be used to interface 5V circuits to circuits of any voltage between V CC and 7 V using an external  
resistor and power supply.  
The MC74VHC1G135 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.  
The MC74VHC1G135 can be used to enhance noise immunity or to square up slowly changing waveforms.  
• High Speed: t PD = 4.9 ns (Typ) at V CC = 5 V  
• Low Internal Power Dissipation: I CC = 2 mA (Max) at T A = 25°C  
• Power Down Protection Provided on Inputs  
• Pin and Function Compatible with Other Standard Logic Families  
• Chip Complexity: FETs = 70; Equivalent Gates = 18  
MARKING DIAGRAMS  
5
4
1
2
VZd  
3
SC–88A/SOT–353/SC–70  
DF SUFFIX  
CASE 419A  
Pin 1  
d = Date Code  
5
4
Figure 1. Pinout (Top View)  
VZd  
1
2
3
Figure 2. Logic Symbol  
TSOP–5/SOT–23/SC–59  
DT SUFFIX  
Pin 1  
CASE 483  
d = Date Code  
FUNCTION TABLE  
Inputs  
Output  
PIN ASSIGNMENT  
A
L
B
L
Y
Z
Z
Z
L
1
2
3
4
5
IN B  
IN A  
L
H
L
GND  
OUT Y  
V CC  
H
H
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the  
package dimensions section on page 4 of this data sheet.  
VH135–1/4  

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