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MC74VHC138DT PDF预览

MC74VHC138DT

更新时间: 2024-11-04 05:22:11
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管驱动
页数 文件大小 规格书
8页 265K
描述
3-To-8 Line Decoder

MC74VHC138DT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.11系列:AHC/VHC
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/5.5 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):18 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

MC74VHC138DT 数据手册

 浏览型号MC74VHC138DT的Datasheet PDF文件第2页浏览型号MC74VHC138DT的Datasheet PDF文件第3页浏览型号MC74VHC138DT的Datasheet PDF文件第4页浏览型号MC74VHC138DT的Datasheet PDF文件第5页浏览型号MC74VHC138DT的Datasheet PDF文件第6页浏览型号MC74VHC138DT的Datasheet PDF文件第7页 
MC74VHC138  
3--to--8 Line Decoder  
The MC74VHC138 is an advanced high speed CMOS 3--to--8  
decoder fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
When the device is enabled, three Binary Select inputs (A0 -- A2)  
determine which one of the outputs (Y0 -- Y 7 ) will go Low. When  
enable input E3 is held Low or either E2 or E1 is held High, decoding  
function is inhibited and all outputs go high. E3, E2, and E1 inputs are  
provided to ease cascade connection and for use as an address decoder  
for memory systems.  
http://onsemi.com  
MARKING DIAGRAMS  
16  
9
VHC138  
AWLYYWW  
SOIC--16  
D SUFFIX  
CASE 751B  
1
8
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7V, allowing the interface of 5V systems  
to 3V systems.  
16  
9
VHC  
138  
AWLYWW  
TSSOP--16  
DT SUFFIX  
CASE 948F  
High Speed: tPD = 5.7ns (Typ) at VCC = 5V  
Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C  
High Noise Immunity: VNIH = VNIL = 28% VCC  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
1
8
16  
9
Designed for 2V to 5.5V Operating Range  
Low Noise: VOLP = 0.8 V (Max)  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 122 FETs or 30.5 Equivalent Gates  
VHC138  
ALYW  
SOIC EIAJ--16  
M SUFFIX  
CASE 966  
1
8
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
These devices are available in Pb--free package(s). Specifications herein  
apply to both standard and Pb--free devices. Please see our website at  
www.onsemi.com for specific Pb--free orderable part numbers, or  
contact your local ON Semiconductor sales office or representative.  
A
= Assembly Location  
WL = Wafer Lot  
= Year  
WW = Work Week  
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
Y
W = Work Week  
ORDERING INFORMATION  
Device  
Package  
Shipping  
48 Units/Rail  
MC74VHC138D  
MC74VHC138DR2  
MC74VHC138DT  
SOIC--16  
SOIC--16 2500 Units/Reel  
TSSOP--16 96 Units/Rail  
MC74VHC138DTR2 TSSOP--16 2500 Units/Reel  
SOIC  
MC74VHC138M  
48 Units/Rail  
EIAJ--16  
SOIC  
EIAJ--16  
MC74VHC138MEL  
2000 Units/Reel  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 -- Rev. 4  
MC74VHC138/D  

MC74VHC138DT 替代型号

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