SEMICONDUCTOR TECHNICAL DATA
The MC74VHC14 is an advanced high speed CMOS Schmitt inverter
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
Pin configuration and function are the same as the MC74VHC04, but the
inputs have hysteresis and, with its Schmitt trigger function, the VHC14 can
be used as a line receiver which will receive slow input signals.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
Low Power Dissipation: I
High Noise Immunity: V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
= 5.5ns (Typ) at V
= 5V
PD
CC
= 2µA (Max) at T = 25°C
CC
A
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
= V
= 28% V
NIH
NIL CC
Low Noise: V
= 0.8V (Max)
OLP
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 60 FETs or 15 Equivalent Gates
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
ORDERING INFORMATION
LOGIC DIAGRAM
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
SOIC
TSSOP
SOICEIAJ
1
3
5
2
4
6
A1
A2
Y1
Y2
FUNCTION TABLE
Inputs
A
Outputs
Y
A3
A4
A5
A6
Y3
Y4
Y5
Y6
Y = A
9
8
10
12
L
H
L
H
11
13
Pinout: 14–Lead Packages (Top View)
V
A6
13
Y6
12
A5
11
Y5
10
A4
9
Y4
8
CC
14
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3
GND
6/97
REV 1
1
Motorola, Inc. 1997