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MC74VHC14D PDF预览

MC74VHC14D

更新时间: 2024-01-15 03:28:32
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 83K
描述
Hex Schmitt Inverter

MC74VHC14D 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.29
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.008 A功能数量:6
输入次数:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:2/5.5 VProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):18.5 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:2.05 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:5.275 mm
Base Number Matches:1

MC74VHC14D 数据手册

 浏览型号MC74VHC14D的Datasheet PDF文件第2页浏览型号MC74VHC14D的Datasheet PDF文件第3页浏览型号MC74VHC14D的Datasheet PDF文件第4页浏览型号MC74VHC14D的Datasheet PDF文件第5页浏览型号MC74VHC14D的Datasheet PDF文件第6页浏览型号MC74VHC14D的Datasheet PDF文件第7页 
MC74VHC14  
Hex Schmitt Inverter  
The MC74VHC14 is an advanced high speed CMOS Schmitt  
inverter fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHC04 but  
the inputs have hysteresis and, with its Schmitt trigger function, the  
VHC14 can be used as a line receiver which will receive slow input  
signals.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
14  
1
SOIC−14  
D SUFFIX  
CASE 751A  
VHC14G  
AWLYWW  
Features  
High Speed: t = 5.5 ns (Typ) at V = 5.0 V  
PD  
CC  
Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C  
CC  
A
High Noise Immunity: V  
= V = 28% V  
NIL CC  
NIH  
14  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
VHC  
14  
TSSOP  
DT SUFFIX  
CASE 948G  
ALYW  
Designed for 2.0 V to 5.5 V Operating Range  
1
Low Noise: V  
= 0.8 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
ESD Performance: Human Body Model > 2000 V;  
Y
WW, W = Work Week  
G or = Pb−Free Package  
Machine Model > 200 V  
Chip Complexity: 60 FETs or 15 Equivalent Gates  
Pb−Free Packages are Available  
(Note: Microdot may be in either location)  
FUNCTION TABLE  
V
A6  
Y6  
A5  
Y5  
A4  
Y4  
CC  
Inputs  
Outputs  
14  
13  
12  
11  
10  
9
8
A
Y
L
H
L
H
1
2
3
4
5
6
7
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
A1  
Y1  
A2  
Y2  
A3  
Y3 GND  
Figure 1. 14−Lead Pinout (Top View)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 − Rev. 9  
MC74VHC14/D  

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