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MC74HC688N PDF预览

MC74HC688N

更新时间: 2024-11-10 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 运算电路逻辑集成电路光电二极管
页数 文件大小 规格书
6页 206K
描述
8-Bit Equality Comparator

MC74HC688N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63其他特性:CASCADABLE
系列:HC/UHJESD-30 代码:R-PDIP-T20
JESD-609代码:e0长度:26.415 mm
负载电容(CL):50 pF逻辑集成电路类型:IDENTITY COMPARATOR
位数:8功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):63 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC74HC688N 数据手册

 浏览型号MC74HC688N的Datasheet PDF文件第2页浏览型号MC74HC688N的Datasheet PDF文件第3页浏览型号MC74HC688N的Datasheet PDF文件第4页浏览型号MC74HC688N的Datasheet PDF文件第5页浏览型号MC74HC688N的Datasheet PDF文件第6页 
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC54/74HC688 is identical in pinout to the LS688. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
The HC688 compares two 8–bit binary or BCD words and indicates  
whether or not they are equal. By using the Cascade Input, two or more of  
the devices may be cascaded to compare words of more than 8 bits.  
J SUFFIX  
CERAMIC PACKAGE  
CASE 732–03  
20  
20  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
1
Low Input Current: 1 µA  
DW SUFFIX  
SOIC PACKAGE  
CASE 751D–04  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
20  
1
Chip Complexity: 116 FETs or 29 Equivalent Gates  
ORDERING INFORMATION  
MC54HCXXXJ  
MC74HCXXXN  
MC74HCXXXDW  
Ceramic  
Plastic  
SOIC  
LOGIC DIAGRAM  
2
A0  
4
PIN ASSIGNMENT  
A1  
6
CASCADE  
INPUT  
A2  
1
20  
V
CC  
8
A3  
A4  
A5  
A6  
A7  
B0  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
DATA  
WORD  
A
A0  
B0  
A1  
2
3
4
19  
18  
17  
A = B  
11  
13  
15  
17  
3
INPUTS  
A7  
B1  
A2  
5
16  
15  
14  
13  
12  
11  
B6  
A6  
B5  
A5  
B4  
A = B  
OUTPUT  
19  
6
5
B2  
7
7
A3  
8
DATA  
WORD  
B
9
B3  
9
12  
14  
16  
18  
GND  
10  
INPUTS  
FUNCTION TABLE  
CASCADE  
INPUT  
1
Inputs  
Output  
PIN 20 = V  
CC  
PIN 10 = GND  
Data  
Words Cascade A = B  
A = B  
A > B  
A < B  
X
L
L
L
L
H
H
H
H
10/95  
REV 6  
Motorola, Inc. 1995  

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