Datasheet > MC74HC738-03AN

MC74HC738-03AN

更新时间： 2024-09-23 05:09:55

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		锁存器
页数	文件大小	规格书
7页	235K
描述
Octal 3-State Noninverting Transparent Latch

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MC74HC738-03AN 数据手册

SEMICONDUCTOR TECHNICAL DATA

High–Performance Silicon–Gate CMOS

J SUFFIX

CERAMIC PACKAGE

CASE 732–03

The MC54/74HC573A is identical in pinout to the LS573. The devices are

compatible with standard CMOS outputs; with pullup resistors, they are

compatible with LSTTL outputs.

These latches appear transparent to data (i.e., the outputs change

asynchronously) when Latch Enable is high. When Latch Enable goes low,

data meeting the setup and hold time becomes latched.

The HC573A is identical in function to the HCT373A but has the data

inputs on the opposite side of the package from the outputs to facilitate PC

board layout.

N SUFFIX

PLASTIC PACKAGE

CASE 738–03

DW SUFFIX

SOIC PACKAGE

CASE 751D–04

The HC573A is the noninverting version of the HC563A.

•

Output Drive Capability: 15 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS and TTL

Operating Voltage Range: 2.0 to 6.0 V

Low Input Current: 1.0 µA

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

DT SUFFIX

TSSOP PACKAGE

CASE 948E–02

ORDERING INFORMATION

MC54HCXXXAJ

MC74HCXXXAN

Ceramic

Plastic

•

Chip Complexity: 218 FETs or 54.5 Equivalent Gates

MC74HCXXXADW SOIC

MC74HCXXXADT TSSOP

LOGIC DIAGRAM

PIN ASSIGNMENT

OUTPUT

ENABLE

NONINVERTING

OUTPUTS

DATA

INPUTS

LATCH ENABLE

PIN 20 = V

PIN 10 = GND

OUTPUT ENABLE

LATCH

ENABLE

GND

Design Criteria

Value

Units

ea.

Internal Gate Count*

54.5

1.5

FUNCTION TABLE

Inputs

Output

Internal Gate Propagation Delay

Internal Gate Power Dissipation

Output Latch

Enable Enable

5.0

µW

Speed Power Product

0.0075

No Change

* Equivalent to a two–input NAND gate.

X = Don’t Care

Z = High Impedance

10/96

REV 7

Motorola, Inc. 1996

12 3 4 5 6 7

中文翻译

下载PDF

与MC74HC738-03AN相关器件

型号	品牌	获取价格	描述	数据表
MC74HC73A	ONSEMI	获取价格	Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
MC74HC73ADG	ONSEMI	获取价格	Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
MC74HC73ADR2G	ONSEMI	获取价格	Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
MC74HC73ADTG	ONSEMI	获取价格	Dual JK Flip Flop with Reset, TSSOP-14, 96-TUBE
MC74HC73ADTR2G	ONSEMI	获取价格	Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
MC74HC73ANG	ONSEMI	获取价格	Dual J-K Flip-Flop with Reset High−Performance Silicon−Gate CMOS
MC74HC73D	MOTOROLA	获取价格	Dual J-K Flip-Flop with Reset
MC74HC73DD	ROCHESTER	获取价格	J-K Flip-Flop
MC74HC73DDS	ROCHESTER	获取价格	J-K Flip-Flop
MC74HC73DR2	MOTOROLA	获取价格	HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PL