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MC74HC373AN PDF预览

MC74HC373AN

更新时间: 2024-10-27 23:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 199K
描述
Octal 3-State Non-Inverting Transparent Latch

MC74HC373AN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP20,.3
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.12
系列:HC/UHJESD-30 代码:R-PDIP-T20
JESD-609代码:e0长度:26.415 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):235电源:2/6 V
Prop。Delay @ Nom-Sup:38 ns传播延迟(tpd):210 ns
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.62 mmBase Number Matches:1

MC74HC373AN 数据手册

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High–Performance Silicon–Gate CMOS  
The MC74HC373A is identical in pinout to the LS373. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
These latches appear transparent to data (i.e., the outputs change  
asynchronously) when Latch Enable is high. When Latch Enable goes  
low, data meeting the setup and hold time becomes latched.  
The Output Enable input does not affect the state of the latches, but  
when Output Enable is high, all device outputs are forced to the  
high–impedance state. Thus, data may be latched even when the  
outputs are not enabled.  
The HC373A is identical in function to the HC573A which has the  
data inputs on the opposite side of the package from the outputs to  
facilitate PC board layout.  
MARKING  
DIAGRAMS  
20  
PDIP–20  
N SUFFIX  
CASE 738  
MC74HC373AN  
AWLYYWW  
20  
1
1
20  
SOIC WIDE–20  
DW SUFFIX  
CASE 751D  
HC373A  
AWLYYWW  
20  
1
The HC373A is the non–inverting version of the HC533A.  
1
20  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1.0 µA  
HC  
373A  
ALYW  
TSSOP–20  
DT SUFFIX  
CASE 948G  
20  
1
1
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
Chip Complexity: 186 FETs or 46.5 Equivalent Gates  
ORDERING INFORMATION  
Device  
Package  
PDIP–20  
Shipping  
1440 / Box  
38 / Rail  
MC74HC373AN  
MC74HC373ADW  
MC74HC373ADWR2  
MC74HC373ADT  
MC74HC373ADTR2  
SOIC–WIDE  
SOIC–WIDE 1000 / Reel  
TSSOP–20 75 / Rail  
TSSOP–20 2500 / Reel  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 8  
MC74HC373A/D  

MC74HC373AN 替代型号

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MC74HC373ANG ONSEMI

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