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MC74HC374ADWG PDF预览

MC74HC374ADWG

更新时间: 2024-11-28 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 138K
描述
Octal 3−State Non−Inverting D Flip−Flop High−Performance Silicon−Gate CMOS

MC74HC374ADWG 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:ROHS COMPLIANT, SOIC-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.08Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.006 A
湿度敏感等级:3位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:2/6 V传播延迟(tpd):190 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

MC74HC374ADWG 数据手册

 浏览型号MC74HC374ADWG的Datasheet PDF文件第2页浏览型号MC74HC374ADWG的Datasheet PDF文件第3页浏览型号MC74HC374ADWG的Datasheet PDF文件第4页浏览型号MC74HC374ADWG的Datasheet PDF文件第5页浏览型号MC74HC374ADWG的Datasheet PDF文件第6页浏览型号MC74HC374ADWG的Datasheet PDF文件第7页 
MC74HC374A  
Octal 3−State Non−Inverting  
D Flip−Flop  
High−Performance Silicon−Gate CMOS  
The MC74HC374A is identical in pinout to the LS374. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
Data meeting the setup time is clocked to the outputs with the rising  
edge of the clock. The Output Enable input does not affect the states of  
the flip−flops, but when Output Enable is high, the outputs are forced  
to the high−impedance state; thus, data may be stored even when the  
outputs are not enabled.  
The HC374A is identical in function to the HC574A which has the  
input pins on the opposite side of the package from the output. This  
device is similar in function to the HC534A which has inverting  
outputs.  
http://onsemi.com  
MARKING  
DIAGRAMS  
20  
20  
PDIP−20  
N SUFFIX  
CASE 738  
MC74HC374AN  
AWLYYWWG  
1
1
20  
SOIC−20  
DW SUFFIX  
CASE 751D  
20  
Features  
74HC374A  
AWLYYWWG  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1.0 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
1
20  
HC  
374A  
ALYWG  
G
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
1
Chip Complexity: 266 FETs or 66.5 Equivalent Gates  
Pb−Free Packages are Available*  
1
20  
SOEIAJ−20  
F SUFFIX  
CASE 967  
20  
74HC374A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G
G
= Pb−Free Package  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
July, 2005 − Rev. 10  
MC74HC374A/D  

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