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MC74HC374A

更新时间: 2024-11-27 23:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 199K
描述
Octal 3-State Non-Inverting D Flip-Flop

MC74HC374A 数据手册

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High–Performance Silicon–Gate CMOS  
The MC74HC374A is identical in pinout to the LS374. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
Data meeting the setup time is clocked to the outputs with the rising  
edge of the clock. The Output Enable input does not affect the states of  
the flip–flops, but when Output Enable is high, the outputs are forced  
to the high–impedance state; thus, data may be stored even when the  
outputs are not enabled.  
The HC374A is identical in function to the HC574A which has the  
input pins on the opposite side of the package from the output. This  
device is similar in function to the HC534A which has inverting  
outputs.  
MARKING  
DIAGRAMS  
20  
PDIP–20  
N SUFFIX  
CASE 738  
MC74HC374AN  
AWLYYWW  
20  
1
1
20  
SOIC WIDE–20  
DW SUFFIX  
CASE 751D  
HC374A  
AWLYYWW  
20  
1
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1.0 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
20  
HC  
374A  
ALYW  
TSSOP–20  
DT SUFFIX  
CASE 948G  
20  
1
1
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
Chip Complexity: 266 FETs or 66.5 Equivalent Gates  
LOGIC DIAGRAM  
2
3
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
PIN ASSIGNMENT  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
5
6
4
OUTPUT  
ENABLE  
1
2
3
4
5
6
7
8
9
20  
V
CC  
7
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
19 Q7  
18 D7  
17 D6  
16 Q6  
15 Q5  
14 D5  
13 D4  
12 Q4  
11 CLOCK  
8
9
DATA  
INPUTS  
NONINVERTING  
OUTPUTS  
13  
14  
17  
18  
12  
15  
16  
19  
11  
CLOCK  
PIN 20 = V  
CC  
PIN 10 = GND  
GND 10  
1
OUTPUT ENABLE  
FUNCTION TABLE  
Inputs  
Output  
ORDERING INFORMATION  
Output  
Enable Clock  
Device  
Package  
PDIP–20  
Shipping  
1440 / Box  
38 / Rail  
D
Q
MC74HC374AN  
L
L
L
H
L
X
X
H
L
MC74HC374ADW  
MC74HC374ADWR2  
MC74HC374ADT  
MC74HC374ADTR2  
SOIC–WIDE  
L,H,  
X
No Change  
Z
SOIC–WIDE 1000 / Reel  
TSSOP–20 75 / Rail  
H
X = don’t care  
Z = high impedance  
TSSOP–20 2500 / Reel  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 8  
MC74HC374A/D  

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