MC74HC373A

更新时间： 2024-10-27 23:01:35

品牌	Logo	应用领域
安森美 - ONSEMI		锁存器
页数	文件大小	规格书
8页	199K
描述
Octal 3-State Non-Inverting Transparent Latch

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数据手册

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MC74HC373A 数据手册

High–Performance Silicon–Gate CMOS

The MC74HC373A is identical in pinout to the LS373. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

http://onsemi.com

These latches appear transparent to data (i.e., the outputs change

asynchronously) when Latch Enable is high. When Latch Enable goes

low, data meeting the setup and hold time becomes latched.

The Output Enable input does not affect the state of the latches, but

when Output Enable is high, all device outputs are forced to the

high–impedance state. Thus, data may be latched even when the

outputs are not enabled.

The HC373A is identical in function to the HC573A which has the

data inputs on the opposite side of the package from the outputs to

facilitate PC board layout.

MARKING

DIAGRAMS

PDIP–20

N SUFFIX

CASE 738

MC74HC373AN

AWLYYWW

SOIC WIDE–20

DW SUFFIX

CASE 751D

HC373A

AWLYYWW

The HC373A is the non–inverting version of the HC533A.

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

373A

ALYW

TSSOP–20

DT SUFFIX

CASE 948G

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

• Chip Complexity: 186 FETs or 46.5 Equivalent Gates

ORDERING INFORMATION

Device

Package

PDIP–20

Shipping

1440 / Box

38 / Rail

MC74HC373AN

MC74HC373ADW

MC74HC373ADWR2

MC74HC373ADT

MC74HC373ADTR2

SOIC–WIDE

SOIC–WIDE 1000 / Reel

TSSOP–20 75 / Rail

TSSOP–20 2500 / Reel

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 8

MC74HC373A/D

12 3 4 5 6 7 8

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