MC74HC139A
Dual 1−of−4 Decoder/
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74HC139A is identical in pinout to the LS139. The device
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
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MARKING
This device consists of two independent 1−of−4 decoders, each of
which decodes a two−bit Address to one−of−four active−low outputs.
Active−low Selects are provided to facilitate the demultiplexing and
cascading functions. The demultiplexing function is accomplished by
using the Address inputs to select the desired device output, and
utilizing the Select as a data input.
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
MC74HC139AN
AWLYYWWG
16
1
1
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
16
SOIC−16
D SUFFIX
CASE 751B
HC139AG
AWLYWW
16
1
• Low Input Current: 1.0 mA
1
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
16
No. 7A
TSSOP−16
DT SUFFIX
CASE 948F
HC
139A
ALYWG
G
16
• Chip Complexity: 100 FETs or 25 Equivalent Gates
• Pb−Free Packages are Available*
1
1
16
1
SOEIAJ−16
F SUFFIX
CASE 966
16
74HC139A
ALYWG
1
A
L, WL
Y, YY
= Assembly Location
= Wafer Lot
= Year
W, WW = Work Week
G
= Pb−Free Package
= Pb−Free Package
G
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
June, 2005 − Rev. 9
MC74HC139A/D