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MC74AC374MELG PDF预览

MC74AC374MELG

更新时间: 2024-09-14 05:09:59
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 116K
描述
Octal D−Type Flip−Flop with 3−State Outputs

MC74AC374MELG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.05
Is Samacsys:N系列:AC
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.575 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:60000000 Hz
最大I(ol):0.012 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3/5 V传播延迟(tpd):15.5 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:5.275 mm
Base Number Matches:1

MC74AC374MELG 数据手册

 浏览型号MC74AC374MELG的Datasheet PDF文件第2页浏览型号MC74AC374MELG的Datasheet PDF文件第3页浏览型号MC74AC374MELG的Datasheet PDF文件第4页浏览型号MC74AC374MELG的Datasheet PDF文件第5页浏览型号MC74AC374MELG的Datasheet PDF文件第6页浏览型号MC74AC374MELG的Datasheet PDF文件第7页 
MC74AC374, MC74ACT374  
Octal D−Type Flip−Flop with  
3−State Outputs  
The MC74AC374/74ACT374 is a high−speed, low−power octal  
D−type flip−flop featuring separate D−type inputs for each flip−flop  
and 3−state outputs for bus−oriented applications. A buffered Clock  
(CP) and Output Enable (OE) are common to all flip−flops.  
http://onsemi.com  
Features  
Buffered Positive Edge−Triggered Clock  
3−State Outputs for Bus−Oriented Applications  
Outputs Source/Sink 24 mA  
PDIP−20  
N SUFFIX  
CASE 738  
1
See MC74AC273 for Reset Version  
See MC74AC377 for Clock Enable Version  
See MC74AC373 for Transparent Latch Version  
See MC74AC574 for Broadside Pinout Version  
See MC74AC564 for Broadside Pinout Version with Inverted  
Outputs  
SOIC−20W  
DW SUFFIX  
CASE 751D  
1
ACT374 Has TTL Compatible Inputs  
Pb−Free Packages are Available  
TSSOP−20  
DT SUFFIX  
CASE 948E  
V
O
D
D
O
O
D
D
O
4
CP  
11  
CC  
7
7
6
6
5
5
4
1
20  
19  
18  
17  
16  
15  
14  
12  
13  
SOEIAJ−20  
M SUFFIX  
CASE 967  
1
1
2
3
4
5
6
7
9
8
10  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 6 of this data sheet.  
OE  
O
D
D
O
O
D
D
O
3
GND  
0
0
1
1
2
2
3
Figure 1. Pinout: 20 Lead Packages Conductors  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
PIN ASSIGNMENT  
PIN  
FUNCTION  
D −D  
Data Inputs  
0
7
D
D
D
D
D
D
D
D
6 7  
0
1
2
3
4
5
CP  
Clock Pulse Input  
3−State Output Enable Input  
3−State Outputs  
CP  
OE  
OE  
O
O
O
O O O O O  
2 3 4 5 6 7  
0
1
O −O  
0
7
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
MC74AC374/D  
November, 2006 − Rev. 8  

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