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MC74AC377DTG PDF预览

MC74AC377DTG

更新时间: 2024-11-22 05:09:59
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
10页 123K
描述
Octal D Flip−Flop with Clock Enable

MC74AC377DTG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.34
系列:ACJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:75000000 Hz最大I(ol):0.012 A
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3/5 V传播延迟(tpd):14.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:125 MHzBase Number Matches:1

MC74AC377DTG 数据手册

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MC74AC377, MC74ACT377  
Octal D Flip−Flop with  
Clock Enable  
The MC74AC377/74ACT377 has eight edge-triggered, D-type  
flip-flops with individual D inputs and Q outputs. The common  
buffered Clock (CP) input loads all flip-flops simultaneously, when  
the Clock Enable (CE) is LOW. The register is fully edge-triggered.  
The state of each D input, one setup time before the LOW-to-HIGH  
clock transition, is transferred to the corresponding flip-flop’s Q  
output. The CE input must be stable only one setup time prior to the  
LOW-to-HIGH clock transition for predictable operation.  
http://onsemi.com  
PDIP−20  
N SUFFIX  
CASE 738  
Features  
1
Ideal for Addressable Register Applications  
Clock Enable for Address and Data Synchronization Applications  
Eight Edge-Triggered D Flip-Flops  
SOIC−20W  
DW SUFFIX  
CASE 751D  
Buffered Common Clock  
Outputs Source/Sink 24 mA  
1
See MC74AC273 for Master Reset Version  
See MC74AC373 for Transparent Latch Version  
See MC74AC374 for 3-State Version  
ACT377 Has TTL Compatible Inputs  
MSL = 1 for all Surface Mount  
Chip Complexity: 292 FETs or 73 Gates  
Pb−Free Packages are Available  
TSSOP−20  
DT SUFFIX  
CASE 948E  
1
SOEIAJ−20  
M SUFFIX  
CASE 967  
V
O
D
D
O
O
D
D
O
4
CP  
11  
CC  
7
7
6
6
5
5
4
1
20  
19  
18  
17  
16  
15  
14  
12  
13  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
DEVICE MARKING INFORMATION  
1
2
3
4
5
6
7
9
8
10  
See general marking information in the device marking  
section on page 7 of this data sheet.  
CE  
O
D
0
D
1
O
O
D
2
D
3
O
3
GND  
0
1
2
Figure 1. Pinout: 20−Lead Packages Conductors  
(Top View)  
PIN NAMES  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
PIN  
FUNCTION  
Data Inputs  
CP  
CE  
D −D  
0
7
O
O
O
O
O
O
O
O
7
CE  
Clock Enable (Active LOW)  
Data Outputs  
0
1
2
3
4
5
6
Q −Q  
0
7
CP  
Clock Pulse Input  
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 9  
MC74AC377/D  

MC74AC377DTG 替代型号

型号 品牌 替代类型 描述 数据表
MC74AC377DTR2G ONSEMI

完全替代

Octal D Flip−Flop with Clock Enable
MC74AC273DTR2G ONSEMI

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Octal D Flip−Flop
MC74AC377DT ONSEMI

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Octal D Flip-Flop with Clock Enable

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