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MC54HCT00A PDF预览

MC54HCT00A

更新时间: 2024-11-15 00:01:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
6页 92K
描述
Quad 2-Input NAND Gate with LSTTL-Compatible Inputs

MC54HCT00A 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 632–08  
The MC54/74HCT00A may be used as a level converter for interfacing  
TTL or NMOS outputs to high–speed CMOS inputs.  
The HCT00A is identical in pinout to the LS00.  
14  
1
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOS–Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
Chip Complexity: 48 FETs or 12 Equivalent Gates  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
14  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
14  
1
ORDERING INFORMATION  
MC54HCTXXAJ  
MC74HCTXXAN  
MC74HCTXXAD  
Ceramic  
Plastic  
SOIC  
LOGIC DIAGRAM  
1
A1  
3
Y1  
Y2  
Y3  
Y4  
2
B1  
4
5
PIN ASSIGNMENT  
A2  
B2  
6
8
3
A1  
B1  
1
2
14  
13  
V
CC  
Y = AB  
B4  
9
A3  
B3  
Y1  
A2  
3
4
12  
11  
A4  
Y4  
10  
12  
13  
A4  
B4  
B2  
Y2  
5
6
10  
9
B3  
A3  
11  
GND  
7
8
Y3  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Inputs  
Output  
A
B
Y
L
L
H
H
L
H
L
H
H
H
L
H
10/95  
REV 6  
Motorola, Inc. 1995  

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