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MC54HCT00AJ

更新时间: 2024-11-14 22:40:23
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
5页 175K
描述
Quad 2-Input NAND Gate with LSTTL-Compatible Inputs

MC54HCT00AJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
系列:HCTJESD-30 代码:R-GDIP-T14
JESD-609代码:e0长度:19.495 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.004 A功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:28 ns
传播延迟(tpd):28 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

MC54HCT00AJ 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 632–08  
The MC54/74HCT00A may be used as a level converter for interfacing  
TTL or NMOS outputs to high–speed CMOS inputs.  
The HCT00A is identical in pinout to the LS00.  
14  
1
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOS–Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
Chip Complexity: 48 FETs or 12 Equivalent Gates  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
14  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
14  
1
ORDERING INFORMATION  
MC54HCTXXAJ  
MC74HCTXXAN  
MC74HCTXXAD  
Ceramic  
Plastic  
SOIC  
LOGIC DIAGRAM  
1
A1  
3
Y1  
Y2  
Y3  
Y4  
2
B1  
4
5
PIN ASSIGNMENT  
A2  
B2  
6
8
3
A1  
B1  
1
2
14  
13  
V
CC  
Y = AB  
B4  
9
A3  
B3  
Y1  
A2  
3
4
12  
11  
A4  
Y4  
10  
12  
13  
A4  
B4  
B2  
Y2  
5
6
10  
9
B3  
A3  
11  
GND  
7
8
Y3  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Inputs  
Output  
A
B
Y
L
L
H
H
L
H
L
H
H
H
L
H
10/95  
REV 6  
Motorola, Inc. 1995  

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