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MC54HC4060A PDF预览

MC54HC4060A

更新时间: 2024-11-15 00:01:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 振荡器计数器
页数 文件大小 规格书
12页 136K
描述
14-Stage Binary Ripple Counter With Oscillator

MC54HC4060A 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
16  
The MC54/74C4060A is identical in pinout to the standard CMOS  
MC14060B. The device inputs are compatible with standard CMOS out-  
puts; with pullup resistors, they are compatible with LSTTL outputs.  
This device consists of 14 master–slave flip–flops and an oscillator  
with a frequency that is controlled either by a crystal or by an RC circuit  
connected externally. The output of each flip–flop feeds the next and the  
frequency at each output is half of that of the preceding one. The state of  
the counter advances on the negative–going edge of the Osc In. The  
active–high Reset is asynchronous and disables the oscillator to allow  
very low power consumption during stand–by operation.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
16  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
State changes of the Q outputs do not occur simultaneously because  
of internal ripple delays. Therefore, decoded output signals are subject to  
decoding spikes and may have to be gated with Osc Out 2 of the  
HC4060A.  
16  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
DT SUFFIX  
TSSOP PACKAGE  
CASE 748C–03  
16  
1
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With JEDEC Standard No. 7A Requirements  
Chip Complexity: 390 FETs or 97.5 Equivalent Gates  
ORDERING INFORMATION  
MC54HCXXXXAJ  
MC74HCXXXXAN  
MC74HCXXXXAD  
Ceramic  
Plastic  
SOIC  
MC74HCXXXXADT TSSOP  
LOGIC DIAGRAM  
Osc Out 1 Osc Out 2  
FUNCTION TABLE  
10  
9
Clock  
Reset  
Output State  
7
5
L
L
No Charge  
Q4  
Advance to Next State  
All Outputs Are Low  
Q5  
4
11  
X
H
Q6  
Osc In  
6
Q7  
14  
13  
15  
1
Pinout: 16–Lead Plastic Package (Top View)  
Q8  
Q9  
Osc  
Out 1 Out 2  
Q9 Reset Osc In  
Osc  
V
Q10  
15  
Q8  
14  
Q10  
Q12  
Q13  
Q14  
CC  
16  
13  
12  
11  
10  
9
2
3
12  
Pin 16 = V  
Pin 8 = GND  
CC  
Reset  
1
2
3
4
5
6
7
8
GND  
Q12  
Q13  
Q14  
Q6  
Q5  
Q7  
Q4  
3/96  
REV 1  
Motorola, Inc. 1996  

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