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MC54HC163AJ PDF预览

MC54HC163AJ

更新时间: 2024-11-14 00:01:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
14页 155K
描述
Presettable Counters

MC54HC163AJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
其他特性:TCO OUTPUT计数方向:UP
系列:HC/UHJESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.495 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):30 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:20 MHzBase Number Matches:1

MC54HC163AJ 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC54/74HC161A and HCI63A are identical in pinout to the LS161  
and LS163. The device inputs are compatible with standard CMOS outputs;  
with pullup resistors, they are compatible with LSTTL outputs.  
The HC161A and HC163A are programmable 4–bit binary counters with  
asynchronous and synchronous reset, respectively.  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
16  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Low Input Current: 1.0 µA  
16  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
Chip Complexity: 192 FETs or 48 Equivalent Gates  
16  
1
LOGIC DIAGRAM  
ORDERING INFORMATION  
MC54HCXXXAJ  
MC74HCXXXAN  
MC74HCXXXAD  
Ceramic  
Plastic  
SOIC  
3
4
5
6
14  
13  
12  
11  
Q0  
Q1  
Q2  
Q3  
P0  
P1  
P2  
P3  
PRESET  
DATA  
INPUTS  
BCD OR  
BINARY  
OUTPUT  
PIN ASSIGNMENT  
RIPPLE  
CARRY  
OUT  
RESET  
1
2
16  
15  
V
CC  
2
15  
CLOCK  
RIPPLE  
CARRY OUT  
CLOCK  
3
4
14  
13  
P0  
P1  
P2  
P3  
Q0  
Q1  
Q2  
1
9
RESET  
LOAD  
5
6
12  
11  
Q3  
7
ENABLE P  
ENABLE T  
COUNT  
ENABLES  
ENABLE T  
LOAD  
7
8
10  
9
PIN 16 = V  
CC  
PIN 8 = GND  
ENABLE P  
GND  
10  
Count  
Mode  
FUNCTION TABLE  
Device  
Reset Mode  
Inputs  
Clock Reset* Load Enable P Enable T  
Output  
Q
HC161A  
HC163A  
Binary  
Binary  
Asynchronous  
Synchronous  
L
X
L
X
X
H
L
X
X
H
X
L
Reset  
Load Preset Data  
Count  
H
H
H
H
H
H
H
No Count  
No Count  
X
* HC163A only. HC161A is an Asynchronous Reset Device  
H = high level  
L = low level  
X = don’t care  
10/95  
Motorola, Inc. 1995  
REV 6  

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