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MC54HC165A

更新时间： 2024-10-14 00:01:07
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摩托罗拉 - MOTOROLA 移位寄存器
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描述
8-Bit Serial or Parallel-Input/Serial-Output Shift Register

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MC54HC165A 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
High–Performance Silicon–Gate CMOS  
The MC54/74HC165A is identical in pinout to the LS165. The device  
inputs are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
This device is an 8–bit shift register with complementary outputs from the  
last stage. Data may be loaded into the register either in parallel or in serial  
form. When the Serial Shift/Parallel Load input is low, the data is loaded  
asynchronously in parallel. When the Serial Shift/Parallel Load input is high,  
the data is loaded serially on the rising edge of either Clock or Clock Inhibit  
(see the Function Table).  
The 2–input NOR clock may be used either by combining two independent  
clock sources or by designating one of the clock inputs to act as a clock  
inhibit.  
16  
16  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
16  
1
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
16  
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
1
Low Input Current: 1 µA  
ORDERING INFORMATION  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
MC54HCXXXAJ  
Ceramic  
Plastic  
SOIC  
MC74HCXXXAN  
MC74HCXXXAD  
MC74HCXXXADT  
•
Chip Complexity: 286 FETs or 71.5 Equivalent Gates  
TSSOP  
LOGIC DIAGRAM  
11  
A
12  
PIN ASSIGNMENT  
B
9
7
13  
Q
Q
SERIAL SHIFT/  
H
SERIAL  
DATA  
OUTPUTS  
C
D
E
1
2
16  
15  
V
CC  
PARALLEL LOAD  
PARALLEL  
DATA  
INPUTS  
14  
3
CLOCK  
CLOCK INHIBIT  
H
E
F
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
D
C
B
A
4
5
F
G
H
G
H
6
PIN 16 = V  
CC  
PIN 8 = GND  
SERIAL  
DATA  
INPUT  
10  
S
A
Q
S
A
H
1
SERIAL SHIFT/  
PARALLEL LOAD  
GND  
Q
H
2
CLOCK  
15  
CLOCK INHIBIT  
FUNCTION TABLE  
Inputs  
Internal Stages  
Output  
Serial Shift/  
Clock  
Parallel Load  
Inhibit  
Clock  
S
A
A – H  
Q
Q
Q
H
Operation  
A
B
L
X
X
X
a … h  
a
b
h
Asynchronous Parallel Load  
H
H
L
L
L
H
X
X
L
H
Q
Q
Q
Q
An  
An  
Gn  
Gn  
Serial Shift via Clock  
H
H
L
L
L
H
X
X
L
H
Q
Q
Q
Q
An  
An  
Gn  
Gn  
Serial Shift via Clock Inhibit  
H
H
X
H
H
X
X
X
X
X
No Change  
Inhibited Clock  
No Clock  
H
L
L
X
X
No Change  
X = don’t care  
Q
– Q  
= Data shifted from the preceding stage  
Gn  
An  
This document contains information on a product under development. Motorola reserves the right to change or  
discontinue this product without notice.  
10/95  
REV 0  
Motorola, Inc. 1995  
1234567...10

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与MC54HC165A相关器件

型号 品牌 获取价格 描述 数据表
MC54HC165AJ MOTOROLA

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 		8-Bit Serial or Parallel-Input/Serial-Output Shift Register
MC54HC165J MOTOROLA

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 		8-Bit Serial or Parallel-Input/Serial-Output Shift Register
MC54HC165JD MOTOROLA

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 		Parallel In Serial Out, HC/UH Series, 8-Bit, Right Direction, Complementary Output, CMOS,
MC54HC165JDS ROCHESTER

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 		Parallel In Serial Out
MC54HC165JS MOTOROLA

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 		IC,SHIFT REGISTER,HC-CMOS,DIP,16PIN,CERAMIC
MC54HC173J MOTOROLA

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 		HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16
MC54HC173JD MOTOROLA

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 		D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 4-Bit, True Output, CMOS, CDIP
MC54HC173JDS MOTOROLA

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 		D Flip-Flop, 4-Func, Positive Edge Triggered, CMOS, CDIP16
MC54HC173JS MOTOROLA

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 		D Flip-Flop, 4-Func, Positive Edge Triggered, CMOS, CDIP16
MC54HC173JS ROCHESTER

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 		D Flip-Flop

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