Datasheet > MC1651

MC1651

更新时间： 2024-09-08 22:51:27

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		转换器
页数	文件大小	规格书
11页	161K
描述
DUAL A/D CONVERTER

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数据手册

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MC1651 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC1650 and the MC1651 are very high speed comparators utilizing

differential amplifier inputs to sense analog signals above or below a reference

level. An output latch provides a unique sample-hold feature. The MC1650

provides high impedance Darlington inputs, while the MC1651 is a lower

impedance option, with higher input slew rate and higher speed capability.

The clock inputs (C and C ) operate from MECL III or MECL 10,000 digital

levels. When C is at a logic high level, Q0 will be at a logic high level provided

that V

V (V is more positive than V ). Q0 is the logic complement of Q0.

2 1 2

When the clock input goes to a low logic level, the outputs are latched in their

present state.

Assessment of the performance differences between the MC1650 and the

MC1651 may be based upon the relative behaviors shown in Figures 4 and 7.

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

LOGIC DIAGRAM

–

2 Q0

3 Q0

PIN ASSIGNMENT

GND

–

14 Q1

15 Q1

+5.0 V = PIN 7, 10

–5.2 V = PIN 8

GND = PIN 1, 16

•

= 330 mW typ/pkg (No Load)

= 3.5 ns typ (MC1650)

= 3.0 ns typ (MC1651)

•

Input Slew Rate = 350 V/µs (MC1650)

= 500 V/µs (MC1651)

•

Differential Input Voltage: 5.0 V (–30°C to +85°C)

Common Mode Range:

–3.0 V to +2.5 V (–30°C to +85°C) (MC1651)

–2.5 V to +3.0 V (–30°C to +85°C) (MC1650)

•

Resolution:

Drives 50 Ω lines

20 mV (–30°C to +85°C)

Number at end of terminal denotes pin number for L package (Case 620).

TRUTH TABLE

, V

n + 1

3/93

Motorola, Inc. 1996

REV 5

4–334

12 3 4 5 6 7...11

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