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MC14534BCP

更新时间： 2024-11-26 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
9页 228K
描述
5 Cascaded BCD Counters

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中文翻译

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MC14534BCP 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP24,.6
针数：24Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.87
Base Number Matches：1

MC14534BCP 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 623  
The MC14534B is composed of five BCD ripple counters that have their  
respective outputs multiplexed using an internal scanner. Outputs of each  
counter are selected by the scanner and appear on four (BCD) pins.  
Selection is indicated by a logic high on the appropriate digit select pin. Both  
BCD and digit select outputs have three–state controls providing an  
“open–circuit” when these controls are high and allowing multiplexing.  
Cascading may be accomplished by using the carry–out pin. The counters  
and scanner can be independently reset by applying a high to the counter  
master reset (MR) and the scanner reset (SR). The MC14534B was  
specifically designed for application in real time or event counters where  
continual updating and multiplexed displays are used.  
P SUFFIX  
PLASTIC  
CASE 709  
DW SUFFIX  
SOIC  
CASE 751E  
•
•
•
•
•
•
Four Operating Modes (See truth table)  
Input Error Detection Circuit  
Clock Conditioning Circuits for Slow Transition Inputs  
Counter Sequences on Positive Transition of Clock A  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBDW  
Plastic  
Ceramic  
SOIC  
T
A
= – 55° to 125°C for all packages.  
BLOCK DIAGRAM  
TO CAPACITORS  
22  
1
V
= PIN 24  
= PIN 12  
DD  
23  
V
CLOCK B  
CLOCK A  
3
SS  
PULSE ERROR  
DETECTOR  
ERROR OUT  
PULSE  
SHAPER  
4
2
TEST  
CONTROL  
MASTER  
RESET  
UNITS  
TENS  
HUNDREDS  
THOUSANDS  
TEN  
THOUSANDS  
13  
CARRY  
CARRY OUT  
C
÷
10  
C
C
÷
10  
C
C
÷
10  
C
C
÷
10  
C
C
÷
10  
C
n+4  
n+4  
n+4  
n+4  
n+4  
CONTROL  
Q0  
Q3  
Q0  
Q3  
Q0  
Q3  
Q0  
Q3  
Q0  
Q3  
5
6
MODE A  
MODE B  
OUTPUT  
17  
18  
MUX  
MUX  
MUX  
MUX  
CONTROL  
Q3  
Q2  
MUX  
BCD  
OUT  
19  
20  
SCANNER  
RESET  
Q1  
Q0  
9
R
10  
SCANNER  
CLOCK  
SCANNER  
3–STATE BCD  
CONTROL  
21  
15  
3–STATE DIGIT  
CONTROL  
3–State Control  
Out  
7
8
14  
16  
11  
DS5  
DS1  
DS2  
DS3  
DS4  
NOTE:  
0
1
Q or DS  
High Impedance  
= 3–STATE  
DIGIT SELECT  
OUTPUT BUFFER  
REV 3  
1/94  
Motorola, Inc. 1995  
1234567...9

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