The MC14536B programmable timer is a 24–stage binary ripple
counter with 16 stages selectable by a binary code. Provisions for an
on–chip RC oscillator or an external clock are provided. An on–chip
monostable circuit incorporating a pulse–type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
http://onsemi.com
MARKING
DIAGRAMS
0
24
• 24 Flip–Flop Stages — Will Count From 2 to 2
• Last 16 Stages Selectable By Four–Bit Select Code
• 8–Bypass Input Allows Bypassing of First Eight Stages
• Set and Reset Inputs
16
PDIP–16
P SUFFIX
CASE 648
MC14536BCP
AWLYYWW
• Clock Inhibit and Oscillator Inhibit Inputs
• On–Chip RC Oscillator Provisions
1
16
• On–Chip Monostable Output Provisions
• Clock Conditioning Circuit Permits Operation With Very Long Rise
and Fall Times
14536B
SOIC–16
DW SUFFIX
CASE 751G
• Test Mode Allows Fast Test Sequence
AWLYYWW
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
• Capable of Driving Two Low–power TTL Loads or One Low–power
16
Schottky TTL Load Over the Rated Temperature Range
SOEIAJ–16
F SUFFIX
CASE 966
MC14536B
AWLYWW
1
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
SS
Symbol
Parameter
Value
Unit
V
A
= Assembly Location
V
DD
DC Supply Voltage Range
–0.5 to +18.0
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
V , V
in out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
DD
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
ORDERING INFORMATION
P
Power Dissipation,
per Package (Note 3.)
500
mW
D
Device
Package
PDIP–16
SOIC–16
Shipping
T
A
Operating Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
MC14536BCP
MC14536BDW
2000/Box
47/Rail
T
stg
T
Lead Temperature
(8–Second Soldering)
L
MC14536BDWR2
MC14536BF
SOIC–16 1000/Tape & Reel
SOEIAJ–16 See Note 1.
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 5
MC14536B/D