MC14536B
Programmable Timer
The MC14536B programmable timer is a 24−stage binary ripple
counter with 16 stages selectable by a binary code. Provisions for an
on−chip RC oscillator or an external clock are provided. An on−chip
monostable circuit incorporating a pulse−type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
http://onsemi.com
MARKING
DIAGRAMS
Features
0
24
• 24 Flip−Flop Stages − Will Count From 2 to 2
• Last 16 Stages Selectable By Four−Bit Select Code
• 8−Bypass Input Allows Bypassing of First Eight Stages
• Set and Reset Inputs
MC14536BCP
AWLYYWWG
1
1
PDIP−16
P SUFFIX
CASE 648
• Clock Inhibit and Oscillator Inhibit Inputs
• On−Chip RC Oscillator Provisions
• On−Chip Monostable Output Provisions
• Clock Conditioning Circuit Permits Operation with Very Long Rise
and Fall Times
14536B
AWLYWWG
• Test Mode Allows Fast Test Sequence
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
SOIC−16 WB
DW SUFFIX
CASE 751G
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
• Pb−Free Packages are Available*
1
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
MC14536B
ALYWG
Rating
Symbol
Value
−0.5 to +18.0
Unit
V
DC Supply Voltage Range
V
DD
1
SOEIAJ−16
F SUFFIX
CASE 966
1
Input or Output Voltage Range
(DC or Transient)
V ,
−0.5 to V + 0.5
V
in
out
DD
V
Input or Output Current
(DC or Transient) per Pin
I , I
in out
10
mA
Power Dissipation per Package (Note 1)
Ambient Temperature Range
P
T
500
mW
°C
D
A
WL, L
YY, Y
WW, W = Work Week
G
= Assembly Location
= Wafer Lot
= Year
−55 to +125
−65 to +150
260
A
Storage Temperature Range
T
stg
°C
= Pb−Free Package
Lead Temperature, (8−Second Soldering)
T
°C
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
Plastic “P and D/DW” Packages: – 7.0 mW/_C from 65_C to 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 9
MC14536B/D