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MC14536BDWR2G PDF预览

MC14536BDWR2G

更新时间: 2024-02-22 23:38:49
品牌 Logo 应用领域
安森美 - ONSEMI 计时器或实时时钟微控制器和处理器外围集成电路光电二极管PC
页数 文件大小 规格书
14页 150K
描述
Programmable Timer

MC14536BDWR2G 技术参数

是否无铅:不含铅生命周期:Active
零件包装代码:SOIC包装说明:SOP,
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:0.54
Samacsys Confidence:3Samacsys Status:Released
2D Presentation:https://componentsearchengine.com/2D/0T/225196.1.1.pngSchematic Symbol:https://componentsearchengine.com/symbol.php?partID=225196
PCB Footprint:https://componentsearchengine.com/footprint.php?partID=2251963D View:https://componentsearchengine.com/viewer/3D.php?partID=225196
Samacsys PartID:225196Samacsys Image:https://componentsearchengine.com/Images/9/MC14536BDWR2G.jpg
Samacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/MC14536BDWR2G.jpgSamacsys Pin Count:16
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:SOIC-16 WB CASE 751G-03 ISSUE DSamacsys Released Date:2015-08-07 09:42:55
Is Samacsys:N最大时钟频率:2 MHz
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:10.3 mm湿度敏感等级:3
端子数量:16计时器数量:1
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压:18 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.5 mmuPs/uCs/外围集成电路类型:TIMER, PROGRAMMABLE
Base Number Matches:1

MC14536BDWR2G 数据手册

 浏览型号MC14536BDWR2G的Datasheet PDF文件第2页浏览型号MC14536BDWR2G的Datasheet PDF文件第3页浏览型号MC14536BDWR2G的Datasheet PDF文件第4页浏览型号MC14536BDWR2G的Datasheet PDF文件第5页浏览型号MC14536BDWR2G的Datasheet PDF文件第6页浏览型号MC14536BDWR2G的Datasheet PDF文件第7页 
MC14536B  
Programmable Timer  
The MC14536B programmable timer is a 24−stage binary ripple  
counter with 16 stages selectable by a binary code. Provisions for an  
on−chip RC oscillator or an external clock are provided. An on−chip  
monostable circuit incorporating a pulse−type output has been  
included. By selecting the appropriate counter stage in conjunction  
with the appropriate input clock frequency, a variety of timing can be  
achieved.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
0
24  
24 Flip−Flop Stages − Will Count From 2 to 2  
Last 16 Stages Selectable By Four−Bit Select Code  
8−Bypass Input Allows Bypassing of First Eight Stages  
Set and Reset Inputs  
MC14536BCP  
AWLYYWWG  
1
1
PDIP−16  
P SUFFIX  
CASE 648  
Clock Inhibit and Oscillator Inhibit Inputs  
On−Chip RC Oscillator Provisions  
On−Chip Monostable Output Provisions  
Clock Conditioning Circuit Permits Operation with Very Long Rise  
and Fall Times  
14536B  
AWLYWWG  
Test Mode Allows Fast Test Sequence  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
1
SOIC−16 WB  
DW SUFFIX  
CASE 751G  
Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky TTL Load over the Rated Temperature Range  
Pb−Free Packages are Available*  
1
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
MC14536B  
ALYWG  
Rating  
Symbol  
Value  
0.5 to +18.0  
Unit  
V
DC Supply Voltage Range  
V
DD  
1
SOEIAJ−16  
F SUFFIX  
CASE 966  
1
Input or Output Voltage Range  
(DC or Transient)  
V ,  
−0.5 to V + 0.5  
V
in  
out  
DD  
V
Input or Output Current  
(DC or Transient) per Pin  
I , I  
in out  
10  
mA  
Power Dissipation per Package (Note 1)  
Ambient Temperature Range  
P
T
500  
mW  
°C  
D
A
WL, L  
YY, Y  
WW, W = Work Week  
G
= Assembly Location  
= Wafer Lot  
= Year  
55 to +125  
65 to +150  
260  
A
Storage Temperature Range  
T
stg  
°C  
= Pb−Free Package  
Lead Temperature, (8−Second Soldering)  
T
°C  
L
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 12 of this data sheet.  
Plastic “P and D/DW” Packages: – 7.0 mW/_C from 65_C to 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 9  
MC14536B/D  
 

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