The MC14518B dual BCD counter and the MC14520B dual binary
counter are constructed with MOS P–channel and N–channel
enhancement mode devices in a single monolithic structure. Each
consists of two identical, independent, internally synchronous 4–stage
counters. The counter stages are type D flip–flops, with
interchangeable Clock and Enable lines for incrementing on either the
positive–going or negative–going transition as required when
cascading multiple stages. Each counter can be cleared by applying a
high level on the Reset line. In addition, the MC14518B will count out
of all undefined states within two clock periods. These complementary
MOS up counters find primary use in multi–stage synchronous or
ripple counting applications requiring low power dissipation and/or
high noise immunity.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
MC14518BCP
AWLYYWW
1
• Diode Protection on All Inputs
16
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Internal and External Speeds
• Logic Edge–Clocked Design — Incremented on Positive Transition
of Clock or Negative Transition on Enable
14518B
SOIC–16
DW SUFFIX
CASE 751G
AWLYYWW
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
1
16
SOEIAJ–16
F SUFFIX
CASE 966
MC14518B
AWLYWW
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
SS
1
Symbol
Parameter
Value
Unit
V
V
DD
DC Supply Voltage Range
–0.5 to +18.0
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
V , V
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
in out
DD
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
ORDERING INFORMATION
Device
Package
PDIP–16
SOIC–16
Shipping
T
Operating Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
A
MC14518BCP
MC14518BDW
2000/Box
47/Rail
T
stg
T
Lead Temperature
L
(8–Second Soldering)
MC14518BDWR2
MC14518BF
SOIC–16 1000/Tape & Reel
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
SOEIAJ–16
SOEIAJ–16
See Note 1.
See Note 1.
MC14518BFEL
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14518B/D