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MC14518BFL2 PDF预览

MC14518BFL2

更新时间： 2024-09-30 21:15:27
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路
页数 文件大小 规格书
8页 90K
描述
IC,COUNTER,UP,DECADE,CMOS,SOP,16PIN,PLASTIC

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中文翻译

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MC14518BFL2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOP, SOP16,.3Reach Compliance Code：unknown
风险等级：5.92计数方向：UP
JESD-30 代码：R-PDSO-G16JESD-609代码：e0
负载电容（CL）：50 pF负载/预设输入：NO
逻辑集成电路类型：DECADE COUNTER最大频率@ Nom-Sup：1500000 Hz
最大I（ol）：0.00064 A工作模式：SYNCHRONOUS
功能数量：2端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
电源：5/15 V认证状态：Not Qualified
子类别：Counters表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
Base Number Matches：1

MC14518BFL2 数据手册

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MC14518B  
Dual Up Counters  
The MC14518B dual BCD counter and the MC14520B dual binary  
counter are constructed with MOS P–channel and N–channel  
enhancement mode devices in a single monolithic structure. Each  
consists of two identical, independent, internally synchronous 4–stage  
counters. The counter stages are type D flip–flops, with  
interchangeable Clock and Enable lines for incrementing on either the  
positive–going or negative–going transition as required when  
cascading multiple stages. Each counter can be cleared by applying a  
high level on the Reset line. In addition, the MC14518B will count out  
of all undefined states within two clock periods. These complementary  
MOS up counters find primary use in multi–stage synchronous or  
ripple counting applications requiring low power dissipation and/or  
high noise immunity.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14518BCP  
AWLYYWW  
1
• Diode Protection on All Inputs  
16  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Internally Synchronous for High Internal and External Speeds  
• Logic Edge–Clocked Design — Incremented on Positive Transition  
of Clock or Negative Transition on Enable  
14518B  
SOIC–16  
DW SUFFIX  
CASE 751G  
AWLYYWW  
• Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
1
16  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14518B  
ALYW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
1
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
DD  
= Year  
WW, W = Work Week  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
per Package (Note 3.)  
500  
mW  
ORDERING INFORMATION  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
T
Operating Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
MC14518BCP  
MC14518BDW  
2000/Box  
47/Rail  
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
MC14518BDWR2  
MC14518BF  
SOIC–16 1000/Tape & Reel  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
MC14518BFEL  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 4  
MC14518B/D  
12345678

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