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MC14517BCPG

更新时间： 2024-11-03 05:10:15
品牌 Logo 应用领域
安森美 - ONSEMI 移位寄存器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 91K
描述
Dual 64−Bit Static Shift Register

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中文翻译

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MC14517BCPG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：ROHS COMPLIANT, PLASTIC, DIP-16针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.38Is Samacsys：N
其他特性：16-BIT, 32-BIT AND 48-BIT OUTPUT ALSO AVAILABLE计数方向：RIGHT
系列：4000/14000/40000JESD-30 代码：R-PDIP-T16
JESD-609代码：e3长度：19.175 mm
逻辑集成电路类型：SERIAL IN SERIAL OUT最大频率@ Nom-Sup：1500000 Hz
位数：64功能数量：2
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：260电源：5/15 V
传播延迟（tpd）：770 ns认证状态：Not Qualified
座面最大高度：4.44 mm子类别：Shift Registers
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Matte Tin (Sn) - annealed端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40触发器类型：POSITIVE EDGE
宽度：7.62 mm最小 fmax：5.3 MHz
Base Number Matches：1

MC14517BCPG 数据手册

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MC14517B  
Dual 64−Bit Static Shift  
Register  
The MC14517B dual 64−bit static shift register consists of two  
identical, independent, 64−bit registers. Each register has separate clock  
and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data  
at the data input is entered by clocking, regardless of the state of the write  
enable input. An output is disabled (open circuited) when the write enable  
input is high. During this time, data appearing at the data input as well as  
the 16−bit, 32−bit, and 48−bit taps may be entered into the device by  
application of a clock pulse. This feature permits the register to be loaded  
with 64 bits in 16 clock periods, and also permits bus logic to be used.  
This device is useful in time delay circuits, temporary memory storage  
circuits, and other serial shift register applications.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP−16  
P SUFFIX  
CASE 648  
MC14516BCP  
AWLYYWWG  
1
1
16  
Features  
SOIC−16  
DW SUFFIX  
CASE 751G  
• Diode Protection on All Inputs  
• Fully Static Operation  
• Output Transitions Occur on the Rising Edge of the Clock Pulse  
• Exceedingly Slow Input Transition Rates May Be Applied to the  
Clock Input  
• 3−State Output at 64th−Bit Allows Use in Bus Logic Applications  
• Shift Registers of any Length may be Fully Loaded with 16 Clock  
Pulses  
14517B  
AWLYYWWG  
1
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
1
WW, W = Work Week  
G
= Pb−Free Package  
PIN ASSIGNMENT  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Q16  
Q48  
WE  
C
1
2
3
4
5
6
7
8
16  
V
DD  
A
A
A
A
A
A
• Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky TTL Load Over the Rated Temperature Range  
• Pb−Free Packages are Available*  
15 Q16  
B
14 Q48  
13 WE  
B
B
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Q64  
Q32  
12  
C
B
Parameter  
Symbol  
Value  
Unit  
V
11 Q64  
10 Q32  
B
B
DC Supply Voltage Range  
V
−0.5 to +18.0  
DD  
D
A
Input or Output Voltage Range  
(DC or Transient)  
V , V  
in out  
−0.5 to V  
+ 0.5  
V
DD  
V
9
D
B
SS  
Input or Output Current (DC or Transient)  
per Pin  
I , I  
in out  
± 10  
mA  
ORDERING INFORMATION  
Power Dissipation per Package (Note 1)  
Operating Temperature Range  
P
T
500  
mW  
°C  
D
†
Device  
Package  
Shipping  
−55 to +125  
−65 to +150  
260  
A
MC14517BCP  
PDIP−16  
25 Units/Rail  
25 Units/Rail  
Storage Temperature Range  
T
stg  
°C  
MC14517BCPG  
PDIP−16  
(Pb−Free)  
Lead Temperature (8−Second Soldering)  
T
°C  
L
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating: Plastic “P and D/DW”  
MC14517BDW  
SOIC−16  
47/Rail  
47/Rail  
MC14517BDWG  
SOIC−16  
(Pb−Free)  
MC14517BDWR2  
SOIC−16 1000/Tape & Reel  
Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14517BDWR2G SOIC−16 1000/Tape & Reel  
(Pb−Free)  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
to the range V v (V or V ) v V  
(e.g., either V or V ). Unused outputs must be left open.  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 6  
MC14517B/D  
 
123456

中文翻译

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MC14517BCPG 替代型号

型号 品牌 替代类型 描述 数据表
MC14517BCP ONSEMI

完全替代

 Dual 64-Bit Static Shift Register
CD4517BF3A TI

类似代替

 CMOS Dual 64-Stage Static Shift Register
CD4517BEE4 TI

类似代替

 CMOS Dual 64-Stage Static Shift Register

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