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MC14093B_06

更新时间： 2024-11-04 04:59:31
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
9页 160K
描述
Quad 2−Input NAND Schmitt Trigger

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MC14093B_06 数据手册

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MC14093B  
Quad 2−Input ꢀNAND"  
Schmitt Trigger  
The MC14093B Schmitt trigger is constructed with MOS  
P−channel and N−channel enhancement mode devices in a single  
monolithic structure. These devices find primary use where low power  
dissipation and/or high noise immunity is desired. The MC14093B  
may be used in place of the MC14011B quad 2−input NAND gate for  
enhanced noise immunity or to “square up” slowly changing  
waveforms.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
PDIP−14  
P SUFFIX  
CASE 646  
Features  
MC14093BCP  
AWLYYWWG  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky TTL Load Over the Rated Temperature Range  
• Triple Diode Protection on All Inputs  
• Pin−for−Pin Compatible with CD4093  
• Can be Used to Replace MC14011B  
1
14  
SOIC−14  
D SUFFIX  
CASE 751A  
14093BG  
AWLYWW  
1
• Independent Schmitt−Trigger at each Input  
• Pb−Free Packages are Available  
14  
1
14  
093B  
ALYW G  
G
TSSOP−14  
DT SUFFIX  
CASE 948G  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
V
DC Supply Voltage Range  
DD  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
DD  
14  
I , I  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
in out  
SOEIAJ−14  
F SUFFIX  
CASE 965  
MC14093B  
ALYWG  
P
Power Dissipation,  
per Package (Note 1)  
500  
mW  
D
1
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
T
stg  
T
Lead Temperature  
(8−Second Soldering)  
L
WW, W = Work Week  
G or G  
= Pb−Free Package  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 − Rev. 7  
MC14093B/D  
 
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