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MC14027BCP PDF预览

MC14027BCP

更新时间: 2024-11-19 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器
页数 文件大小 规格书
8页 187K
描述
Dual J-K Flip-Flop

MC14027BCP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:7 weeks风险等级:5.32
Is Samacsys:N系列:4000/14000/40000
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm负载电容(CL):50 pF
逻辑集成电路类型:J-K FLIP-FLOP最大频率@ Nom-Sup:1500000 Hz
位数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:RAIL
峰值回流温度(摄氏度):235电源:5/15 V
传播延迟(tpd):350 ns认证状态:Not Qualified
座面最大高度:4.44 mm子类别:FF/Latches
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:6.5 MHz
Base Number Matches:1

MC14027BCP 数据手册

 浏览型号MC14027BCP的Datasheet PDF文件第2页浏览型号MC14027BCP的Datasheet PDF文件第3页浏览型号MC14027BCP的Datasheet PDF文件第4页浏览型号MC14027BCP的Datasheet PDF文件第5页浏览型号MC14027BCP的Datasheet PDF文件第6页浏览型号MC14027BCP的Datasheet PDF文件第7页 
The MC14027B dual J–K flip–flop has independent J, K, Clock (C),  
Set (S) and Reset (R) inputs for each flip–flop. These devices may be  
used in control, register, or toggle functions.  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Logic Swing Independent of Fanout  
http://onsemi.com  
Logic Edge–Clocked Flip–Flop Design —  
MARKING  
DIAGRAMS  
16  
Logic state is retained indefinitely with clock level either high or low;  
information is transferred to the output only on the positive–going  
edge of the clock pulse  
PDIP–16  
P SUFFIX  
CASE 648  
MC14027BCP  
AWLYYWW  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4027B  
1
16  
SOIC–16  
D SUFFIX  
CASE 751B  
14027B  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
1
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
16  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
in out  
DD  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14027B  
AWLYWW  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
1
P
D
Power Dissipation,  
500  
mW  
per Package (Note 3.)  
A
= Assembly Location  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
ORDERING INFORMATION  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14027BCP  
MC14027BD  
2000/Box  
2400/Box  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
MC14027BDR2  
SOIC–16 2500/Tape & Reel  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
MC14027BF  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
SS  
DD  
MC14027BFEL  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14027B/D  

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