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MC14027BF PDF预览

MC14027BF

更新时间： 2024-11-19 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 187K
描述
Dual J-K Flip-Flop

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中文翻译

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MC14027BF 数据手册

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The MC14027B dual J–K flip–flop has independent J, K, Clock (C),  
Set (S) and Reset (R) inputs for each flip–flop. These devices may be  
used in control, register, or toggle functions.  
• Diode Protection on All Inputs  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Logic Swing Independent of Fanout  
http://onsemi.com  
• Logic Edge–Clocked Flip–Flop Design —  
MARKING  
DIAGRAMS  
16  
Logic state is retained indefinitely with clock level either high or low;  
information is transferred to the output only on the positive–going  
edge of the clock pulse  
PDIP–16  
P SUFFIX  
CASE 648  
MC14027BCP  
AWLYYWW  
• Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
• Pin–for–Pin Replacement for CD4027B  
1
16  
SOIC–16  
D SUFFIX  
CASE 751B  
14027B  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
1
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
16  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
in out  
DD  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14027B  
AWLYWW  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
1
P
D
Power Dissipation,  
500  
mW  
per Package (Note 3.)  
A
= Assembly Location  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
ORDERING INFORMATION  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14027BCP  
MC14027BD  
2000/Box  
2400/Box  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
MC14027BDR2  
SOIC–16 2500/Tape & Reel  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
MC14027BF  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
SS  
DD  
MC14027BFEL  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14027B/D  
12345678

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MC14027BF 替代型号

型号 品牌 替代类型 描述 数据表
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